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TUSB4041I-Q1 Datasheet(PDF) 32 Page - Texas Instruments |
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TUSB4041I-Q1 Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 44 page  VDD11 VDD33 BOARD_3P3V BOARD_1P1V C22 0.1 F µ TUSB4041I_PAP U1G RSVD 23 RSVD 24 RSVD 26 RSVD 27 NC 28 RSVD 35 RSVD 36 RSVD 38 RSVD 39 NC 40 RSVD 43 RSVD 44 RSVD 46 RSVD 47 RSVD 51 RSVD 52 RSVD 54 RSVD 55 RSVD 58 RSVD 59 RSVD 61 RSVD 62 VDD33 2 VDD33 20 VDD33 31 VDD33 48 C23 10 µF C19 0.1 F µ C20 0.1 F µ C28 10 µF C16 0.1 F µ C24 0.1 µF C17 0.1 F µ C26 0.1 µF C25 0.1 µF C18 0.1 F µ C27 0.1 µF FB5 220 at 100 MHz C21 0.1 F µ FB6 220 at 100 MHz R18 4.7 K TUSB4041I_PAP U1F GRSTZ 18 XO 29 XI 30 SDA/SMBDAT 5 SCL/SMBDAT 6 SMBUSZ 7 PWRCTL_POL 9 AUTOENZ/HS_SUSPEND 13 TEST 17 USB_R1 32 R15 9.53 K 0402 1% C29 1 µF R16 4.7 K Y1 24 MHz C31 18 pF R14 1M C30 18 pF 32 TUSB4041I-Q1 SLLSEK4B – JULY 2015 – REVISED JANUARY 2016 www.ti.com Product Folder Links: TUSB4041I-Q1 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated 9.2.2.7 Clock, Reset, and Miscellaneous The PWRCTL_POL is left unconnected which results in active-high power enable (PWRCTL1, PWRCTL2, PWRCTL3, and PWRCTL4) for a USB VBUS power switch. The 1-µF capacitor on the GRSTN pin can only be used if the VDD11 supply is stable before the VDD33 supply. Depending on the supply ramp of the two supplies, the user may need to adjust the capacitor. Figure 32. Clock, Reset, and Miscellaneous 9.2.2.8 TUSB4041I-Q1 Power Implementation Figure 33. TUSB4041I-Q1 Power Implementation |
Similar Part No. - TUSB4041I-Q1 |
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Similar Description - TUSB4041I-Q1 |
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