2

TUSB4041I-Q1

SLLSEK4B – JULY 2015 – REVISED JANUARY 2016

www.ti.com

Product Folder Links: TUSB4041I-Q1

Submit Documentation Feedback

Copyright © 2015–2016, Texas Instruments Incorporated

Table of Contents

1

Features .................................................................. 1

2

Applications ........................................................... 1

3

Description ............................................................. 1

4

Revision History..................................................... 2

5

Description (continued)......................................... 3

6

Pin Configuration and Functions ......................... 4

7

Specifications......................................................... 8

7.1

Absolute Maximum Ratings ...................................... 8

7.2

ESD Ratings ............................................................ 8

7.3

Recommended Operating Conditions ....................... 9

7.4

Thermal Information .................................................. 9

7.5

3.3-V I/O Electrical Characteristics ........................... 9

7.6

Power-Up Timing Requirements ............................. 10

7.7

Hub Input Supply Current ....................................... 10

8

Detailed Description ............................................ 11

8.1

Overview ................................................................. 11

8.2

Functional Block Diagram ....................................... 11

8.3

Feature Description................................................. 12

8.4

Device Functional Modes........................................ 14

8.5

Register Maps ......................................................... 15

9

Application and Implementation ........................ 27

9.1

Application Information............................................ 27

9.2

Typical Application .................................................. 27

10

Power Supply Recommendations ..................... 34

10.1

TUSB4041I-Q1 Power Supply .............................. 34

10.2

Downstream Port Power ....................................... 34

10.3

Ground .................................................................. 34

11

Layout................................................................... 35

11.1

Layout Guidelines ................................................. 35

11.2

Layout Example .................................................... 36

12

Device and Documentation Support ................. 37

12.1

Documentation Support ........................................ 37

12.2

Community Resource............................................ 37

12.3

Trademarks ........................................................... 37

12.4

Electrostatic Discharge Caution ............................ 37

12.5

Glossary ................................................................ 37

13

Mechanical, Packaging, and Orderable

Information ........................................................... 37

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision A (September 2015) to Revision B

Page

•

Changed the configuration of the PWRCTL_POL pin (R17) in the Clock, Reset, and Miscellaneous section .................... 32

Changes from Original (July 2015) to Revision A

Page

•

Changed pin number for USB_DP_DN1 and USB_DP_DN2 in the Pin Functions table ...................................................... 6