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TUSB4041I-Q1 Datasheet(PDF) 18 Page - Texas Instruments

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Part # TUSB4041I-Q1
Description  Four-Port USB 2.0 Hub
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TUSB4041I-Q1 Datasheet(HTML) 18 Page - Texas Instruments

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TUSB4041I-Q1
SLLSEK4B – JULY 2015 – REVISED JANUARY 2016
www.ti.com
Product Folder Links: TUSB4041I-Q1
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Copyright © 2015–2016, Texas Instruments Incorporated
Table 9. Device Configuration Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
3
ganged
RW
X
Ganged
This bit is loaded at the deassertion of reset with the value of the
GANGED/SMBA2/HS_UP pin.
0 = Each port is individually power switched and enabled by the
PWRCTL[4:1]/BATEN[4:1] pins.
1 = The power switch control for all ports is ganged and enabled by the
PWRCTL[4:1]/BATEN1 pin.
When the TUSB4041I-Q1 device is in I2C mode, the TUSB4041I-Q1 device loads
this bit from the contents of the EEPROM.
When the TUSB4041I-Q1 device is in SMBUS mode, the value may be overwritten
by an SMBus host.
2
fullPwrMgmtz
RW
X
Full power management
This bit is loaded at the deassertion of reset with the value of the
FULLPWRMGMTz/SMBA1 pin.
0 = Port power switching status reporting is enabled
1 = Port power switching status reporting is disabled
When the TUSB4041I-Q1 device is in I2C mode, the TUSB4041I-Q1 device loads
this bit from the contents of the EEPROM.
When the TUSB4041I-Q1 device is in SMBUS mode, the value may be overwritten
by an SMBus host.
1
RSVD
RW
0
Reserved
This field is reserved and should not be altered from the default.
0
RSVD
R
0
Reserved
This field is reserved and returns 0 when read.
8.5.8 Battery Charging Support Register
Offset = 6h
Figure 9. Battery Charging Support Register
7
6
5
4
3
2
1
0
RSVD
batEn[3:0]
R-0
RW-X
Table 10. Battery Charging Support Register Field Descriptions
Bit
Field
Type
Reset
Description
7:4
RSVD
R
0
Reserved
Read only, returns 0 when read.
3:0
batEn[3:0]
RW
X
Battery Charger Support. The bits in this field indicate whether the downstream port
implements the charging port features.
0 = The port is not enabled for battery charging support features
1 = The port is enabled for battery charging support features
Each bit corresponds directly to a downstream port, that is batEn0 corresponds to
downstream port 1, and batEN1 corresponds to downstream port 2.
The default value for these bits are loaded at the deassertion of reset with the value
of PWRCTL/BATEN[3:0].
When in I2C/SMBus mode the bits in this field may be overwritten by EEPROM
contents or by an SMBus host.


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