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LMH0356

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SNLS270L – AUGUST 2007 – REVISED JANUARY 2016

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Copyright © 2007–2016, Texas Instruments Incorporated

8.3.2.2 Serial Data Input Selector

The Serial Data Input Selector (SEL [1:0]) allows the user to select the active input channel. Table 2 shows the

input selected for a given state of SEL [1:0]. The SEL pins have internal pulldowns.

Table 2. Data Input Select Codes

SEL [1:0] CODE

SELECTED INPUT

00

SDI0

01

SDI1

10

SDI2

11

SDI3

8.3.2.3 Lock Detect

The Lock Detect output, when high, indicates that data is being received and the PLL is locked. Lock Detect may

be connected to the OUTPUT MUTE input to mute the data and clock outputs when no data signal is being

received. Note that when the Bypass/Auto Bypass input is set high, Lock Detect will remain low. See Table 3.

8.3.2.4 OUTPUT MUTE

The OUTPUT MUTE input, when low, mutes the serial data and clock outputs. It may be connected to Lock

Detect or externally driven to mute or un-mute the outputs. If OUTPUT MUTE is connected to Lock Detect, then

the data and clock outputs are muted when the PLL is not locked. This function overrides the Bypass function;

see Table 3. OUTPUT MUTE has an internal pullup device to enable the output by default.

8.3.2.5 Bypass/AUTO BYPASS

The Bypass/Auto Bypass input, when high, forces the device to output the data without reclocking it. When this

input is low, the device automatically bypasses the reclocking function when the device is in an unlocked

condition or the detected data rate is a rate which the device does not support. Note that when the Bypass/Auto

Bypass input is set high, Lock Detect remains low. See Table 3. BYPASS/AUTO BYPASS has an internal

pulldown device.

Table 3. Control Functionality

LOCK DETECT

OUTPUT MUTE

BYPASS/AUTO BYPASS

DEVICE STATUS

0

1

X

PLL unlocked, reclocker bypassed

1

1

0

PLL locked to supported data rate, reclocker not bypassed

X

0

X

Outputs muted

0

LOCK DETECT

X

Outputs muted

1

LOCK DETECT

0

PLL locked to supported data rate, reclocker not bypassed

8.3.2.6 SD/HD

The SD/HD output indicates whether the LMH0356 is processing SD or HD / 3 Gbps data rates. It may be used

to control another device such as the LMH0302 cable driver. When this output is high it indicates that the data

rate is 270 Mbps. When low, the indicated data rate is 1483, 1485, 2967, or 2970 Mbps. The SD/HD output is a

registered function and is only valid when the PLL is locked and the Lock Detect output is high. When the PLL is

not locked (the Lock Detect output is low), the SD/HD output defaults to HD (low). The SD/HD output is

undefined for a short time after lock detect assertion or de-assertion due to a data rate change on SDI. See

Figure 1 for a timing diagram showing the relationship between SDI, Lock Detect, and SD/HD.

8.3.2.7 SCO_EN

Input SCO_EN enables the SCO/SDO2 differential output to function either as a serial clock or second serial

data output. SCO/SDO2 functions as a serial clock when SCO_EN is high. This pin has an internal pulldown

device. The default state (low) enables the SCO/SDO2 output as a second serial data output.