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LMH0356 Datasheet(PDF) 12 Page - Texas Instruments

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Part # LMH0356
Description  3-Gbps HD/SD SDI Reclocker with 4:1 Input Mux and FR4 EQs
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMH0356 Datasheet(HTML) 12 Page - Texas Instruments

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50:
SDO, SCO/SDO2
VCC
VCC
50:
VCC
SDO, SCO/SDO2
12
LMH0356
SNLS270L – AUGUST 2007 – REVISED JANUARY 2016
www.ti.com
Product Folder Links: LMH0356
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Copyright © 2007–2016, Texas Instruments Incorporated
Feature Description (continued)
Figure 3. Equivalent SDO Output Circuit (SDO, SDO, SCO/SDO2, SCO/SDO2)
8.3.1.2 Operating Serial Data Rates
This device operates at serial data rates of 270 Mbps, 1483 Mbps, 1485 Mbps, 2967 Mbps, and 2970 Mbps. The
device does not lock to harmonics of these rates. The device does not lock and automatically enters the
reclocker bypass mode for the following data rates: 143 Mbps, 177 Mbps, 360 Mbps, and 540 Mbps.
8.3.1.3 Serial Data Clock/Serial Data 2 Output
The Serial Data Clock/Serial Data 2 Output is controlled by the SCO_EN input and provides either a second
retimed serial data output or a low jitter differential clock output appropriate to the serial data rate being
processed. When operating as a serial clock output, the rising edge of the clock is positioned within the
corresponding serial data bit interval within 10% of the center of the data interval.
Differential output SCO/SDO2 functions as the second serial data output when the SCO_EN input is a logic-low
level. This output functions as the serial clock output when the SCO_EN input is a logic-high level. The SCO_EN
input has an internal pulldown device and the default state of SCO_EN is low (serial data output 2 enabled).
SCO/SDO2 is muted when the OUTPUT MUTE input is a logic low level. When the Bypass mode is activated
and this output is functioning as a serial clock output, the output is muted. If an unsupported data rate is used
while in Auto Bypass mode with this output functioning as a serial clock output, the output is invalid.
8.3.2 Control Inputs and Indicator Outputs
8.3.2.1 Serial Data Rate Selector
The Serial Data Rate Selector (RATE [1:0]) permits the user to fix the operating serial data rate. RATE[1:0] pins
have internal pull-downs which maintain a logic-low input condition unless externally driven to a logic-high
condition. This input also serves to place the device in a test mode. The codes shown in Table 1 select the
desired operating serial data rate. The LMH0356 then enters either the Auto-Rate Detect mode or a single
operating rate. Selecting the 270-Mbps rate mode may also be used when reclocking DVB-ASI data. DVB-ASI
data is MPEG2 coded data that is transmitted in 8B10B coding. The device reclocks this data without harmonic
locking.
Table 1. Data Rate Select Input Codes
RATE [1:0]
CODE
DATA RATE OR MODE
COMMENTS
00
Auto-Rate Detect mode
01
270 Mbps
May be used to support DVB-ASI operation
10
1483/1485 Mbps, 2967/2970 Mbps


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