SDI[3:0]

V

CC

V

CC

SDI[3:0]

2 kW

80 kW

1 pF

20 kW

V

CC

2 kW

50

network

W

50

network

W

11

LMH0356

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SNLS270L – AUGUST 2007 – REVISED JANUARY 2016

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Copyright © 2007–2016, Texas Instruments Incorporated

8.3 Feature Description

8.3.1 Functional Block Description

8.3.1.1 Serial Data Input and Outputs

The differential serial data inputs, SDI0-SDI3, accept serial digital video data at the rates specified in Table 1.

Figure 2 shows the equivalent input circuit for SDI[3:0] and SDI[3:0]. The serial data inputs are differential

LVPECL compatible. These inputs have 50-

Ω internal terminations (100-Ω differential) with an internal bias as

shown in Figure 2. These inputs are intended to be DC-coupled to devices such as the LMH0344 adaptive cable

equalizer. DC-coupled inputs must be kept within the specified common mode range. The inputs may be AC-

coupled if the input signal is outside the input common mode range of the device (such as when interfacing to 5-

V PECL), and in that case the bias is supplied internally so no additional input biasing is required. See Figure 2

for more information on input interfacing.

The LMH0356 provides four independent, equalized and multiplexed data inputs. The active input channel is

selected via the SEL0 and SEL1 pins, as shown in Table 2. The equalizer on each of the four inputs is capable

of equalizing up to 30 inches of FR4 trace without the need for programming for different trace lengths or data

rates.

The LMH0356 has two retimed, differential, serial data outputs: SDO and SCO/SDO2. These outputs provide

low-jitter, differential, retimed data to devices such as the LMH0302 cable driver. Output SCO/SDO2 is

multiplexed and can provide either a second serial data output or a serial clock output. Figure 3 shows the

equivalent output circuit for SDO, SDO, SCO/SDO2, and SCO/SDO2.

The SCO_EN input controls the operating mode for the SCO/SDO2 output. When the SCO_EN input is high the

SCO/SDO2 output provides a serial clock. When SCO_EN is low, the SCO/SDO2 output provides retimed serial

data.

Both differential serial data outputs, SDO and SCO/SDO2, are muted when the OUTPUT MUTE input is a logic

low level. SCO/SDO2 also mutes when the Bypass mode is activated when this output is operating as the serial

clock output. When muted, SDO and SDO (or SDO2 and SDO2) will assume opposite differential output levels.

The CML serial data outputs are differential LVPECL compatible. These outputs have internal 50-

Ω pullups and

are suitable for driving AC- or DC-coupled, 100-

Ω center-tapped, AC-grounded or 100-Ω un-center-tapped,

differentially terminated networks.

Figure 2. Equivalent SDI Input Circuit (SDI[3:0], SDI[3:0])