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CDCM6208V1FRGZR Datasheet(PDF) 68 Page - Texas Instruments |
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CDCM6208V1FRGZR Datasheet(HTML) 68 Page - Texas Instruments |
68 / 87 page ![]() CDCM6208V1F SCAS943 – MAY 2015 www.ti.com Table 38. Maximum Total Jitter Over PVT With and Without Low Pass Filter (continued) MAX TJ [ps] FREQUENCY MAX TJ [ps] MAX TJ [ps] OUTPUT with 13 MHz LOW PASS [MHz] DSP SPEC without LOW PASS FILTER FILTER 156.25 Y4 56 57.66 17.48 (6 bit fraction) 156.25 Y5 56 76.87 32.32 (20 bit fraction) Y6 100.00 56 86.30 33.86 Y7 66.667 300 81.71 35.77 Figure 51 shows the maximum Total Jitter with, without Low Pass Filter characteristic and the maximum TI KeyStone™ I specification. Figure 51. Maximum Jitter Over PVT NOTE Due to the damping characteristic of the DSP SERDES PLLs, the actual TJ data can be worse. 68 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CDCM6208V1F |
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