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CDCE62005 Datasheet(PDF) 8 Page - Texas Instruments |
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CDCE62005 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 85 page CDCE62005 SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015 www.ti.com Electrical Characteristics (continued) recommended operating conditions for the CDCE62005 device for under the specified Industrial temperature range of –40°C to 85°C PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT EEPROM EEcy Programming cycle of EEPROM 100 1000 Cycles EEret Data retention 10 Years VBB Termination voltage for reference IBB = –0.2 mA, Depending on the VBB 0.9 1.9 V inputs. setting. INPUT BUFFERS INTERNAL TERMINATION RESISTORS (PRI_REF and SEC_REF) Termination resistance Single ended 50 Ω PHASE DETECTOR fCPmax Charge pump frequency 0.04 40 MHz LVCMOS OUTPUT / AUXILIARY OUTPUT (1) fclk Output frequency (see Figure 7) Load = 5 pF to GND 0 250 MHz High-level output voltage for VOH VCC = min to max IOH = –100 μA VCC –0.5 LVCMOS outputs Low-level output voltage for VOL VCC = min to max IOL =100 µA 0.3 V LVCMOS outputs IOH High-level output current VCC = 3.3 V VO = 1.65 V –30 mA IOL Low-level output current VCC = 3.3 V VO = 1.65 V 33 mA Reference (PRI_REF or SEC_REF) Outputs are set to 122.88 MHz, tpho 0.35 ns to Output Phase offset Reference at 30.72 MHz tpd(LH)/ Propagation delay from PRI_REF Crosspoint to VCC/2, Bypass Mode 4 ns or SEC_REF to Outputs tpd(HL) All Outputs set at 200 MHz, Reference tsk(o) Skew, output to output For Y0 to Y4 75 ps = 200 MHz CO Output capacitance on Y0 to Y4 VCC = 3.3 V; VO = 0 V or VCC 5 pF IOZH VO = VCC 5 μA 3-State LVCMOS output current IOZL VO = 0 V –5 μA IOPDH VO = VCC 25 μA Power Down output current IOPDL VO = 0 V 5 μA Duty cycle LVCMOS 45% 55% tslew-rate Output rise/fall slew rate 3.6 5.2 V/ns 8 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: CDCE62005 |
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