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CDCE62005 Datasheet(PDF) 70 Page - Texas Instruments

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Part # CDCE62005
Description  3:5 Clock Generator
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CDCE62005 Datasheet(HTML) 70 Page - Texas Instruments

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CDCE62005
SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015
www.ti.com
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 Frequency Synthesizer
As shown in Figure 47, the CDCE62005 has internal dividers, twin onboard VCOs, a phase frequency detector,
charge pump, partially internal loop filter, and LVPECL/LVDS/LVCMOS input and output buffers, all of which
completes a PLL. Through the PLL operation, the VCO clock synchronizes with the reference clock input and
ultimately with all clock outputs. All outputs are completely synchronized in terms of phase and frequency with
the reference clock input. When powering up from the EEPROM, the SYNC signal synchronizes outputs after
device power-up.
See SCAA096 for a detailed description of the application configuration.
9.2 Typical Application
Figure 47. CDCE62005 Settings for Multiple Frequency Synthesis Example
9.2.1 Design Requirements
Assume a typical application, where a total of two 156.25-MHz LVPECL, two 125-MHz LVDS, and two 25-MHz
LVCMOS output clocks are desired and should be phase-locked to a single back-plane input reference clock of
25 MHz. The goal of this example is to identify the input (M), prescaler (N), feedback (FB), and output (P) divider
values, the VCO frequency to lock to, and the other related PLL settings needed to derive the different output
frequencies from the common input and VCXO frequencies. Follow the steps outlined in Detailed Design
Procedure to achieve this goal.
70
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Copyright © 2008–2015, Texas Instruments Incorporated
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