CDCE62005 datasheet(65/85 Pages) TI1

Part #	CDCE62005

Description	3:5 Clock Generator

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Manufacturer	TI1 [Texas Instruments]

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CDCE62005

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SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015

8.6.5 Device Registers: Register 4 Address 0x04

Table 44. CDCE62005 Register 4 Bit Definitions

RAM BIT

BIT NAME

BLOCK

0

RESERVED

—

This bit must be set to a 1

EEPROM

0 (default): Outputs have deterministic delay relative to low-to-high pulse of SYNC pin when the EEPROM SYNC

signal is synchronized with the reference input and added 6

μs delay.

1

SYNC_MODE1

Outputs

EEPROM

1: outputs have deterministic delay relative to low-to-high pulse of SYNC pin when the SYNC signal is

synchronized with the reference input

2

RESERVED

Must be set to 0

EEPROM

3

RESERVED

Must be set to 0

EEPROM

4

OUTMUX4SELX

Output 4

OUTPUT MUX 4 Select. Selects the Signal driving Output Divider 4

EEPROM

(X,Y) = 00: PRI_REF, 01:SEC_REF, 10:SMART_MUX, 11:VCO_CORE

5

OUTMUX4SELY

Output 4

EEPROM

6

PH4ADJC0

Output 4

EEPROM

7

PH4ADJC1

Output 4

EEPROM

8

PH4ADJC2

Output 4

EEPROM

9

PH4ADJC3

Output 4

Coarse phase adjust select for output divider 4

EEPROM

10

PH4ADJC4

Output 4

EEPROM

11

PH4ADJC5

Output 4

EEPROM

12

PH4ADJC6

Output 4

EEPROM

13

OUT4DIVRSEL0

Output 4

EEPROM

14

OUT4DIVRSEL1

Output 4

EEPROM

15

OUT4DIVRSEL2

Output 4

EEPROM

16

OUT4DIVRSEL3

Output 4

OUTPUT DIVIDER 4 Ratio Select

EEPROM

17

OUT4DIVRSEL4

Output 4

EEPROM

18

OUT4DIVRSEL5

Output 4

EEPROM

19

OUT4DIVRSEL6

Output 4

EEPROM

When set to 0, the divider is disabled

20

OUT4DIVSEL

Output 4

EEPROM

When set to 1, the divider is enabled

High Swing LVPECL When set to 1 and Normal Swing when set to 0.

– If LVCMOS or LVDS is selected the Output swing will stay at the same level.

(1)

21

HiSWINGLVPEC4

Output 4

EEPROM

– If LVPECL buffer is selected the Output Swing will be 30% higher if this bit is set to 1 and Normal LVPECL if it

is set to 0.

22

CMOSMODE4PX

Output 4

LVCMOS mode select for OUTPUT 4 Positive Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

23

CMOSMODE4PY

Output 4

EEPROM

24

CMOSMODE4NX

Output 4

LVCMOS mode select for OUTPUT 3 Negative Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

25

CMOSMODE4NY

Output 4

EEPROM

26

OUTBUFSEL4X

Output 4

OUTPUT TYPE

RAM BITS

EEPROM

22

23

24

25

26

27

LVPECL

0

1

LVDS

0

1

0

1

27

OUTBUFSEL4Y

Output 4

EEPROM

LVCMOS

See Settings Above*

0

Output Disabled

0

1

0

1

0

* Use Description for Bits 22,23,24 and 25 for setting the LVCMOS Outputs

(1)

Set the R4.21 0 for LVDS and LVCMOS outputs

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