CDCE62005 datasheet(64/85 Pages) TI1

Part #	CDCE62005

Description	3:5 Clock Generator

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Manufacturer	TI1 [Texas Instruments]

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CDCE62005

SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015

www.ti.com

8.6.4 Device Registers: Register 3 Address 0x03

Table 43. CDCE62005 Register 3 Bit Definitions

RAM BIT

BIT NAME

BLOCK

Reference

0

REFDIV2

Reference Divider Bit 2.

EEPROM

Divider

1

RESERVED

Must be set to 0.

EEPROM

2

RESERVED

Must be set to 0.

EEPROM

3

RESERVED

Must be set to 0.

EEPROM

4

OUTMUX3SELX

Output 3

OUTPUT MUX 3 Select. Selects the Signal driving Output Divider 3.

EEPROM

(X,Y) = 00: PRI_REF, 01:SEC_REF, 10:SMART_MUX, 11:VCO_CORE

5

OUTMUX3SELY

Output 3

EEPROM

6

PH3ADJC0

Output 3

EEPROM

7

PH3ADJC1

Output 3

EEPROM

8

PH3ADJC2

Output 3

EEPROM

9

PH3ADJC3

Output 3

Coarse phase adjust select for output divider 3

EEPROM

10

PH3ADJC4

Output 3

EEPROM

11

PH3ADJC5

Output 3

EEPROM

12

PH3ADJC6

Output 3

EEPROM

13

OUT3DIVRSEL0

Output 3

EEPROM

14

OUT3DIVRSEL1

Output 3

EEPROM

15

OUT3DIVRSEL2

Output 3

EEPROM

16

OUT3DIVRSEL3

Output 3

OUTPUT DIVIDER 3 Ratio Select

EEPROM

17

OUT3DIVRSEL4

Output 3

EEPROM

18

OUT3DIVRSEL5

Output 3

EEPROM

19

OUT3DIVRSEL6

Output 3

EEPROM

When set to 0, the divider is disabled

20

OUT3DIVSEL

Output 3

EEPROM

When set to 1, the divider is enabled

High Swing LVPECL When set to 1 and Normal Swing when set to 0.

– If LVCMOS or LVDS is selected the Output swing will stay at the same level.

(1).

21

HiSWINGLVPEC3

Output 3

EEPROM

– If LVPECL buffer is selected the Output Swing will be 30% higher if this bit is set to 1 and Normal LVPECL if it

is set to 0.

22

CMOSMODE3PX

Output 3

LVCMOS mode select for OUTPUT 3 Positive Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

23

CMOSMODE3PY

Output 3

EEPROM

24

CMOSMODE3NX

Output 3

LVCMOS mode select for OUTPUT 3 Negative Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

25

CMOSMODE3NY

Output 3

EEPROM

26

OUTBUFSEL3X

Output 3

OUTPUT TYPE

RAM BITS

EEPROM

22

23

24

25

26

27

LVPECL

0

1

LVDS

0

1

0

1

27

OUTBUFSEL3Y

Output 3

EEPROM

LVCMOS

See Settings Above*

0

Output Disabled

0

1

0

1

0

* Use Description for Bits 22,23,24 and 25 for setting the LVCMOS Outputs

(1)

Set the R3.21 to 0 for LVDS and LVCMOS outputs

64

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