CDCE62005 datasheet(61/85 Pages) TI1

Part #	CDCE62005

Description	3:5 Clock Generator

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Manufacturer	TI1 [Texas Instruments]

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CDCE62005

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SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015

8.6 Register Maps

8.6.1 Device Registers: Register 0 Address 0x00

Table 40. CDCE62005 Register 0 Bit Definitions

RAM

BIT NAME

BIT

BLOCK

0

DIV2PRIX

Pre-Divider Selection for the Primary Reference

EEPROM

Primary

(X,Y)=00:3-state, 01:Divide by 1, 10:Divide by 2, 11:Reserved

Reference

1

DIV2PRIY

EEPROM

2

RESERVED

Must be set to 0

EEPROM

3

RESERVED

Must be set to 0

EEPROM

4

OUTMUX0SELX

Output 0

OUTPUT MUX 0 Select. Selects the Signal driving Output Divider 0

EEPROM

(X,Y) = 00: PRI_REF, 01:SEC_REF, 10:SMART_MUX, 11:VCO_CORE

5

OUTMUX0SELY

Output 0

EEPROM

6

PH0ADJC0

Output 0

EEPROM

7

PH0ADJC1

Output 0

EEPROM

8

PH0ADJC2

Output 0

EEPROM

9

PH0ADJC3

Output 0

Coarse phase adjust select for output divider 0

EEPROM

10

PH0ADJC4

Output 0

EEPROM

11

PH0ADJC5

Output 0

EEPROM

12

PH0ADJC6

Output 0

EEPROM

13

OUT0DIVRSEL0

Output 0

EEPROM

14

OUT0DIVRSEL1

Output 0

EEPROM

15

OUT0DIVRSEL2

Output 0

EEPROM

16

OUT0DIVRSEL3

Output 0

OUTPUT DIVIDER 0 Ratio Select

EEPROM

17

OUT0DIVRSEL4

Output 0

EEPROM

18

OUT0DIVRSEL5

Output 0

EEPROM

19

OUT0DIVRSEL6

Output 0

EEPROM

When set to 0, the divider is disabled.

20

OUT0DIVSEL

Output 0

EEPROM

When set to 1, the divider is enabled.

High Swing LVPECL When set to 1 and Normal Swing when set to 0.

– If LVCMOS or LVDS is selected the Output swing will stay at the same level.

(1)

21

HiSWINGLVPECL0

Output 0

EEPROM

– If LVPECL buffer is selected the Output Swing will be 30% higher if this bit is set to 1 and Normal LVPECL if it

is set to 0.

22

CMOSMODE0PX

Output 0

LVCMOS mode select for OUTPUT 0 Positive Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

23

CMOSMODE0PY

Output 0

EEPROM

24

CMOSMODE0NX

Output 0

LVCMOS mode select for OUTPUT 0 Negative Pin.

EEPROM

(X,Y)=00:Active, 10:Inverting, 11:Low, 01:3-State

25

CMOSMODE0NY

Output 0

EEPROM

26

OUTBUFSEL0X

Output 0

OUTPUT TYPE

RAM BITS

EEPROM

22

23

24

25

26

27

LVPECL

0

1

LVDS

0

1

0

1

27

OUTBUFSEL0Y

Output 0

EEPROM

LVCMOS

See Settings Above

0

Output Disabled

0

1

0

1

0

* Use Description for Bits 22,23,24 and 25 for setting the LVCMOS Outputs

(1)

Set RegisterR0.21 to 0 for LVDS and LVCMOS outputs

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