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CDCE62005 Datasheet(PDF) 60 Page - Texas Instruments |
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CDCE62005 Datasheet(HTML) 60 Page - Texas Instruments |
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60 / 85 page  5 4 3 2 Register 5 RegisterNumber (s) RAMBitNumber (s) 5.2 Device Registers Interface & Control Smart MUX Frequency Synthesizer Output Channel 1 Output Channel 2 Output Channel 3 Output Channel 4 Output Channel 0 EEPROM Input Block Synthesizer Block Output Blocks Interface & Control Block CDCE62005 SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015 www.ti.com 8.5.1.7 Writing to EEPROM After the CDCE62005 detects a power-up and completes a reset cycle, it copies the contents of the on-board EEPROM into the Device Registers. Therefore, the CDCE62005 initializes into a known state pre-defined by the user. The host issues one of two special commands shown in Table 38 to copy the contents of Device Registers 0 through 7 (a total of 184 bits) into EERPOM. They include: • Copy RAM to EEPROM – Unlock, Execution of this command can happen many times. • Copy RAM to EEPROM – Lock: Execution of this command can happen only once, after which the EEPROM is permanently locked. After either command is initiated, power must remain stable and the host must not access the CDCE62005 for at least 50 ms to allow the EEPROM to complete the write cycle and to avoid the possibility of EEPROM corruption. 8.5.2 Device Configuration The Functional Description Section described four different functional blocks contained within the CDCE62005. Figure 45 depicts these blocks along with a high-level functional block diagram of the circuit elements comprising each block. The balance of this section focuses on a detailed discussion of each functional block from the perspective of how to configure them. Figure 45. CDCE62005 Circuit Blocks Throughout this section, references to Device Register memory locations follow the following convention: Figure 46. Device Register Reference Convention 60 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: CDCE62005 |
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