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CDCE62005 Datasheet(PDF) 54 Page - Texas Instruments |
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CDCE62005 Datasheet(HTML) 54 Page - Texas Instruments |
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54 / 85 page  SERDES CleanedClock Data CDCE 62005 RecoveredClock ASICClock ASIC DataConverterJitterRequirements 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 1 10 100 1000 10000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 50fs 100fs 350fs 1ps CDCE62005 SCAS862F – NOVEMBER 2008 – REVISED JANUARY 2015 www.ti.com Figure 37 plots Equation 14 and Equation 16 for constant values of total jitter. When used in conjunction with most ADCs, the CDCE62005 supports a total jitter performance value of <1 ps. Figure 37. Data Converter Jitter Requirements 8.4.3.2 CDCE62005 SERDES Startup Mode A common scenario involves a host communicating to a satellite system via a high-speed wired communications link. Typical communications media might be a cable, backplane, or fiber. The reference clock for the satellite system is embedded in the high speed link. This reference clock must be recovered by the SERDES, however, the recovered clock contains unacceptable levels of jitter due to a degradation of SNR associated with transmission over the media. At system startup, the satellite system must self-configure prior to the recovery and cleanup of the reference clock provided by the host. Furthermore, upon loss of the communication link with the host, the satellite system must continue to operate albeit with limited functionality. Figure 38 shows a block diagram of an optical based system with such a mechanism that takes advantage of the features of the CDCE62005: Figure 38. CDCE62005 SERDES Startup Overview The functionality provided by the Smart Multiplexer provides a straightforward implementation of a SERDES clock link. The Auxiliary Input provides a startup clock because it connects to a crystal. The on-chip EEPROM determines the default configuration at power-up. Therefore, the CDCE62005 requires no host communication to begin cleaning the recovered clock once it is available. The CDCE62005 immediately begins clocking the satellite components including the SERDES using the crystal as a clock source and a frequency reference. After 54 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: CDCE62005 |
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