TPA3116D2-Q1, TPA3118D2-Q1

SLOS862A – JULY 2015 – REVISED AUGUST 2015

www.ti.com

6.4 Thermal Information

TPA3116D2-Q1

TPA3118D2-Q1

DAD

DAP

UNIT

32 PINS

32 PINS

Junction-to-ambient thermal resistance

32.4

°C/W

Junction-to-case (top) thermal resistance

1.2

17.2

°C/W

Junction-to-board thermal resistance

21.5

17.3

°C/W

Junction-to-top characterization parameter

1.2

0.4

°C/W

Junction-to-board characterization parameter

21

17.2

°C/W

Junction-to-case (bottom) thermal resistance

N/A

1

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

6.5 DC Electrical Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Class-D output offset voltage (measured

1.5

15

mV

differentially)

20

35

Quiescent supply current

mA

32

50

<50

Quiescent supply current in shutdown

µA

mode

50

400

Drain-source on-state resistance,

120

m

Ω

measured pin-to-pin

R1 = open, R2 = 20 k

Ω

19

20

21

dB

R1 = 100 k

Ω, R2 = 20 kΩ

25

26

27

G

Gain (BTL)

R1 = 100 k

Ω, R2 = 39 kΩ

31

32

33

dB

R1 = 75 k

Ω, R2 = 47 kΩ

35

36

37

R1 = 51 k

Ω, R2 = 51 kΩ

19

20

21

dB

R1 = 47 k

Ω, R2 = 75 kΩ

25

26

27

G

Gain (SLV)

R1 = 39 k

Ω, R2 = 100 kΩ

31

32

33

dB

R1 = 16 k

Ω, R2 = 100 kΩ

35

36

37

Turn-on time

10

ms

Turn-off time

2

µs

GVDD

Gate drive supply

6.4

6.9

7.4

V

Output voltage maximum under PLIMIT

6.75

7.9

8.75

V

control

6

Submit Documentation Feedback

Copyright © 2015, Texas Instruments Incorporated

Product Folder Links: TPA3116D2-Q1 TPA3118D2-Q1