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TPA3110D2-Q1 Datasheet(PDF) 23 Page - Texas Instruments |
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TPA3110D2-Q1 Datasheet(HTML) 23 Page - Texas Instruments |
23 / 36 page ![]() C = i 1 2 Z f p i c f = c 1 2 Z C p i i -3dB fc f= 1 2 Z C p i i Ci IN Zi Zf Input Signal TPA3110D2-Q1 www.ti.com SLOS794B – SEPTEMBER 2012 – REVISED SEPTEMBER 2015 Typical Application (continued) 8.2.2.5 Input Resistance Changing the gain setting can vary the input resistance of the amplifier from its smallest value, 9 k Ω ±20%, to the largest value, 60 k Ω ±20%. As a result, if a single capacitor is used in the input high-pass filter, the –3 dB or cutoff frequency may change when changing gain steps. The –3-dB frequency can be calculated using Equation 2. Use the ZI values given in Table 2. (2) 8.2.2.6 Input Capacitor, CI In the typical application, an input capacitor (CI) is required to allow the amplifier to bias the input signal to the proper DC level for optimum operation. In this case, CI and the input impedance of the amplifier (ZI) form a high- pass filter with the corner frequency determined in Equation 3. (3) The value of CI is important, as it directly affects the bass (low-frequency) performance of the circuit. Consider the example where ZI is 60 kΩ and the specification calls for a flat bass response down to 20 Hz. Equation 3 is reconfigured as Equation 4. (4) In this example, CI is 0.13 µF; so, one would likely choose a value of 0.15 μF as this value is commonly used. If the gain is known and is constant, use ZI from Table 2 to calculate CI. A further consideration for this capacitor is the leakage path from the input source through the input network (CI) and the feedback network to the load. This leakage current creates a DC offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the DC level there is held at 3 V, which is likely higher than the source DC level. Note that it is important to confirm the capacitor polarity in the application. Additionally, lead-free solder can create DC offset voltages and it is important to ensure that boards are cleaned properly. 8.2.2.7 BSN and BSP Capacitors The full H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the high side of each output to turn on correctly. A 0.22- μF ceramic capacitor, rated for at least 25 V, must be connected from each output to its corresponding bootstrap input. Specifically, one 0.22- μF capacitor must be connected from OUTPx to BSPx, and one 0.22- μF capacitor must be connected from OUTNx to BSNx. (See the application circuit diagram in TPA3110D2-Q1 Simplified Application Schematic .) Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Links: TPA3110D2-Q1 |
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