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MC145151P2 Datasheet(PDF) 23 Page - Motorola, Inc |
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MC145151P2 Datasheet(HTML) 23 Page - Motorola, Inc |
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23 / 36 page  MC145151–2 through MC145158–2 MOTOROLA 23 MC14515X–2 FAMILY CHARACTERISTICS AND DESCRIPTIONS MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage – 0.5 to + 10.0 V Vin, Vout Input or Output Voltage (DC or Transient) except SW1, SW2 – 0.5 to VDD + 0.5 V Vout Output Voltage (DC or Transient), SW1, SW2 (Rpull–up = 4.7 kΩ) – 0.5 to + 15 V Iin, Iout Input or Output Current (DC or Transient), per Pin ± 10 mA IDD, ISS Supply Current, VDD or VSS Pins ± 30 mA PD Power Dissipation, per Package† 500 mW Tstg Storage Temperature – 65 to + 150 °C TL Lead Temperature, 1 mm from Case for 10 seconds 260 °C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section. †Power Dissipation Temperature Derating: Plastic DIP: – 12 mW/ °C from 65 to 85°C SOG Package: – 7 mW/ °C from 65 to 85°C ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Symbol Parameter Test Condition VDD V – 40 °C 25 °C 85 °C Unit Symbol Parameter Test Condition VDD V Min Max Min Max Min Max Unit VDD Power Supply Voltage Range — 3 9 3 9 3 9 V Iss Dynamic Supply Current fin = OSCin = 10 MHz, 1 V p–p ac coupled sine wave R = 128, A = 32, N = 128 3 5 9 — — — 3.5 10 30 — — — 3 7.5 24 — — — 3 7.5 24 mA ISS Quiescent Supply Current (not including pull–up current component) Vin = VDD or VSS Iout = 0 µA 3 5 9 — — — 800 1200 1600 — — — 800 1200 1600 — — — 1600 2400 3200 µA Vin Input Voltage — fin, OSCin Input ac coupled sine wave — 500 — 500 — 500 — mV p–p VIL Low–Level Input Voltage — fin, OSCin Vout ≥ 2.1 V Input dc Vout ≥ 3.5 V coupled Vout ≥ 6.3 V square wave 3 5 9 — — — 0 0 0 — — — 0 0 0 — — — 0 0 0 V VIH High–Level Input Voltage — fin, OSCin Vout ≤ 0.9 V Input dc Vout ≤ 1.5 V coupled Vout ≤ 2.7 V square wave 3 5 9 3.0 5.0 9.0 — — — 3.0 5.0 9.0 — — — 3.0 5.0 9.0 — — — V VIL Low–Level Input Voltage — except fin, OSCin 3 5 9 — — — 0.9 1.5 2.7 — — — 0.9 1.5 2.7 — — — 0.9 1.5 2.7 V VIH High–Level Input Voltage — except fin, OSCin 3 5 9 2.1 3.5 6.3 — — — 2.1 3.5 6.3 — — — 2.1 3.5 6.3 — — — V Iin Input Current (fin, OSCin) Vin = VDD or VSS 9 ± 2 ± 50 ± 2 ± 25 ± 2 ± 22 µA IIL Input Leakage Current (Data, CLK, ENB — without pull–ups) Vin = VSS 9 — – 0.3 — – 0.1 — – 1.0 µA IIH Input Leakage Current (all inputs except fin, OSCin) Vin = VDD 9 — 0.3 — 0.1 — 1.0 µA (continued) These devices contain protection circuitry to protect against damage due to high static voltages or electric fields. However, precau- tions must be taken to avoid applications of any voltage higher than maximum rated voltages to these high–impedance circuits. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD except for SW1 and SW2. SW1 and SW2 can be tied through external resistors to voltages as high as 15 V, indepen- dent of the supply voltage. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD), except for inputs with pull–up devices. Unused outputs must be left open. |
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