NOA1305

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8

sequence sent by the master to the slave device. The

command since the read command itself does not include a

register address. When reading from a read only data register

in the NOA1305 it is acceptable to write a 0 to the register

in order to update the address pointer, but the 0 does not

actually over−write the value in the data register.

78

8

A[6:0]

D[7:0]

D[7:0]

WRITE ACK

ACK

ACK

Device

Address

Register

Address

Register

Data

Start

Condition

Condition

011 1001 0

0

00000000

0000 0110 00

0x72

78

8

A[6:0]

D[7:0]

D[7:0]

READ

ACK

ACK

NACK

Device

Address

Register

Data [A]

Register

Data [A+1]

Start

Condition

Stop

Condition

011 1001 1

0

bbbbbbbb

bbbbbbbb 01

0x73

Stop

D[7:0] ACK

D[7:0] ACK

address (NOA1305 = 0x39) and the read (1) command bit.

The NOA1305 will acknowledge this byte transfer with an

appropriate ACK. The NOA1305 will then begin shifting

out data from the register just addressed. If the master wishes

to receive more data (next register address), it will ACK the

slave at the end of the 8 bit data transmission, and the slave

will respond by sending the next byte, and so on. To signal

the end of the read transaction, the master will send a NACK

Rise and Fall Time of SDA (Output)

bus capacitance low and selecting suitable pull−up resistor

values. Figure 15 shows the fall time on SDA in output mode

under maximum load conditions. The measurement set−up

is shown in Figure 18. Figure 14 shows the maximum value

capacitance.

NOA1305

LED

Pulse

Generator

ADC

SDA

SCL

16−bits

Control

INT

ADC

Control

Figure 18. Measurement Set−up

hn

Interface