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LC88FC2H0B Datasheet(PDF) 42 Page - ON Semiconductor |
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LC88FC2H0B Datasheet(HTML) 42 Page - ON Semiconductor |
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42 / 47 page  LC88FC2H0B www.onsemi.com 42 ■ Characteristics of a Sample Main System Clock Oscillation Circuit Given below are the characteristics of a sample main system clock oscillation circuit that are measured using a Our Company -designated oscillation characteristics evaluation board and external components with circuit constant values with which the oscillator vendor confirmed normal and stable oscillation. ■ Table 1 Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Resonator Nominal Frequency Vendor Name Resonator Circuit Constant Operating Voltage Range [V] Oscillation Stabilization Time Remarks C3 [pF] C4 [pF] Rf [ ] Rd2 [ ] typ [ms] max [ms] 12 MHz MURATA CSTCE12M0G52-R0 (10) (10) OPEN 330 2.2 to 3.6 0.02 0.2 C1, C2 integrated type 10 MHz CSTCE10M0G52-R0 (10) (10) OPEN 680 2.2 to 2.6 0.02 0.2 C1, C2 integrated type CSTLS10M0G53-B0 (15) (15) OPEN 680 2.2 to 3.6 0.02 0.2 C1, C2 integrated type The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after VDD goes above the lower limit level of the operating voltage range (see Figure 4) ■ Characteristics of a Sample Subsystem Clock Oscillator Circuit Given below are the characteristics of a sample subsystem clock oscillation circuit that are measured using a Our Company -designated oscillation characteristics evaluation board and external components with circuit constant values with which the oscillator vendor confirmed normal and stable oscillation. ■ Table 2 Characteristics of a Sample Subsystem Clock Oscillator Circuit with a Crystal Resonator Nominal Frequency Vendor Name Resonator Circuit Constant Operating Voltage Range [V] Oscillation Stabilization Time Remarks C3 [pF] C4 [pF] Rf2 [ ] Rd2 [ ] typ [s] max [s] 32.768 kHz EPSON TOYOCOM MC-306 10 10 Open 330K 2.2 to 3.6 1.0 3.0 CL=7.0pF The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after the instruction for starting the subclock oscillator circuit is executed plus the time interval that is required for the oscillation to get stabilized after the HOLD mode is released (see Figure 4). Note : The traces to and from the components that are involved in oscillation should be kept as short as possible as the oscillation characteristics are affected by their trace pattern. Figure 1. CF oscillator circuit Figure 2. XT Oscillator Circuit Figure 3. AC Timing Measurement Point C3 Rd2 C4 X’tal XT2 XT1 Rf2 0.5VDD C1 C2 CF CF2 CF1 Rd1 Rf1 |
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