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LC88FC2H0B Datasheet(PDF) 18 Page - ON Semiconductor |
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LC88FC2H0B Datasheet(HTML) 18 Page - ON Semiconductor |
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18 / 47 page  LC88FC2H0B www.onsemi.com 18 ■ Allowable Operating Conditions at Ta=–40 to +85C, VSS1=VSS2=VSS3=VSS4=0V Parameter Symbol Applicable Pin/Remarks Conditions Specification VDD [V] min typ max unit Operating supply voltage (Note 2-1) VDD (1) VDD1=VDD2=VDD3 0.081s ≤ tCYC ≤ 66s 3.0 3.6 V 0.098 s ≤ tCYC ≤ 66s 2.7 3.6 Memory sustaining supply voltage VHD VDD1=VDD2=VDD3 RAM and register contents sustained in HOLD mode 2.0 3.6 High level input voltage VIH (1) Ports 0, 1, 2, 3, 4 Port 5, A, B 2.7 to 3.6 0.3VDD +0.7 VDD VIH (2) Ports 6, 7, D,PC2 2.7 to 3.6 0.3VDD +0.7 VDD VIH (3) RESB PC0, PC1, PC3, PC4 2.7 to 3.6 0.75VDD VDD VIH (4) P22, P23, PA4, PA5, PB4, PB5 I2C side 2.7 to 3.6 0.7VDD VDD Low level input voltage VIL (1) When ports 1, 2, 3, 4, 5, A and port B, PnFSAn=0 Ports 0, 6, 7, D, PC2 2.7 to 3.6 VSS 0.2VDD VIL (2) When ports 1, 2, 3, 4, 5, A and port B, PnFSAn=1 2.7 to 3.6 VSS 0.2VDD VIL (3) CF1, RESB PC0, PC1,PC3, PC4 2.7 to 3.6 VSS 0.25VDD VIL (4) P22, P23, PA4, PA5, PB4, PB5 I2C side 2.7 to 3.6 VSS 0.3VDD Instruction cycle time (Note 2-2) tCYC 3.0 to 3.6 0.081 66 s 2.7 to 3.6 0.098 66 External system clock frequency FEXCF (1) CF1 CF2 pin open System clock frequency division ratio = 1/1 External system clock DUTY50 5% 3.0 to 3.6 0.1 12 MHz 2.7 to 3.6 0.1 10 CF2 pin open System clock frequency division ratio = 1/2 3.0 to 3.6 0.2 24 2.7 to 3.6 0.2 20 Note 2-1 : Relationship between tCYC and oscillation frequency is 1/FmCF when frequency division ratio is 1/1 and 2/FmCF when the ratio is 1/2. Continued on next page. |
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Similar Description - LC88FC2H0B |
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