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8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM

Micron Technology, Inc., reserves the right to change products or specifications without notice.

MT55L512L18P_2.p65 – Rev. 6/01

©2001, Micron Technology, Inc.

8Mb: 512K x 18, 256K x 32/36

PIPELINED ZBT SRAM

Q

50

V = 1.5V

Z = 50

O

T

Figure 1

Q

351

317

5pF

+3.3V

Figure 2

3.3V I/O AC TEST CONDITIONS

Input rise and fall times ..................................... 1ns

Input timing reference levels .......................... 1.5V

Output reference levels ................................... 1.5V

Output load ............................. See Figures 1 and 2

LOAD DERATING CURVES

The Micron 512K x 18, 256K x 32, and 256K x 36 ZBT

SRAM timing is dependent upon the capacitive loading

on the outputs.

Consult the factory for copies of I/O current versus

voltage curves.

Q

50

Ω

V = 1.25V

Z = 50

Ω

O

T

Figure 3

Q

225

Ω

225

Ω

5pF

+2.5V

Figure 4

2.5V I/O AC TEST CONDITIONS

Input rise and fall times ..................................... 1ns

Input timing reference levels ........................ 1.25V

Output reference levels ................................. 1.25V

Output load ............................. See Figures 3 and 4

3.3V I/O Output Load Equivalents

2.5V I/O Output Load Equivalents