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8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM

Micron Technology, Inc., reserves the right to change products or specifications without notice.

MT55L512L18P_2.p65 – Rev. 6/01

©2001, Micron Technology, Inc.

8Mb: 512K x 18, 256K x 32/36

PIPELINED ZBT SRAM

2.5V I/O DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS

(0°C

≤ T

DESCRIPTION

CONDITIONS

SYMBOL

MIN

MAX

UNITS

NOTES

Input High (Logic 1) Voltage

Data bus (DQx)

1.7

V

1, 2

Inputs

1.7

V

1, 2

Input Low (Logic 0) Voltage

-0.3

0.7

V

1, 2

Input Leakage Current

0V

-1.0

1.0

µA

3

Output Leakage Current

Output(s) disabled,

-1.0

1.0

µA

0V

Output High Voltage

1.7

–

V1

2.0

–

V1

Output Low Voltage

–

0.7

V

1

–

0.4

V

1

Supply Voltage

3.135

3.465

V

1

Isolated Output Buffer Supply

2.375

2.9

V

1

2. Overshoot:

Undershoot:

Power-up:

3. MODE pin has an internal pull-up, and input leakage = ±10µA.

4. This parameter is sampled.

5. Preliminary package data.

TQFP CAPACITANCE

DESCRIPTION

CONDITIONS

SYMBOL

TYP

MAX

UNITS

NOTES

Control Input Capacitance

34

pF

4

Input/Output Capacitance (DQ)

45

pF

4

Address Capacitance

3

3.5

pF

4

Clock Capacitance

3

3.5

pF

4

FBGA CAPACITANCE

DESCRIPTION

CONDITIONS

SYMBOL

TYP

MAX

UNITS

NOTES

Address/Control Input Capacitance

2.5

3.5

p F

4, 5

Output Capacitance (Q)

T

4

5

p F

4, 5

Clock Capacitance

2.5

3.5

p F

4, 5

BGA CAPACITANCE

DESCRIPTION

CONDITIONS

SYMBOL

TYP

MAX

UNITS

NOTES

Address/Control Input Capacitance

T

47

pF

4

Input/Output Capacitance (DQ)

4.5

5.5

pF

4

Address Capacitance

47

pF

4

Clock Capacitance

4.5

5.5

pF

4