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MT55L512L18P-1 Datasheet(PDF) 10 Page - Micron Technology |
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MT55L512L18P-1 Datasheet(HTML) 10 Page - Micron Technology |
10 / 30 page 10 8Mb: 512K x 18, 256K x 32/36 Pipelined ZBT SRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. MT55L512L18P_2.p65 – Rev. 6/01 ©2001, Micron Technology, Inc. 8Mb: 512K x 18, 256K x 32/36 PIPELINED ZBT SRAM x18 x32/x36 SYMBOL TYPE DESCRIPTION 8B 8B OE# Input Output Enable: This active LOW, asynchronous input enables the (G#) data I/O output drivers. 8A 8A ADV/LD# Input Synchronous Address Advance/Load: When HIGH, this input is used to advance the internal burst counter, controlling burst access after the external address is loaded. When ADV/LD# is HIGH, R/W# is ignored. A LOW on ADV/LD# clocks a new address at the CLK rising edge. 1R 1R MODE Input Mode: This input selects the burst sequence. A LOW on this input (LBO#) selects “linear burst.” NC or HIGH on this input selects “interleaved burst.” Do not alter input state while device is operating. (a) 10J, 10K, (a) 10J, 10K, DQa Input/ SRAM Data I/Os: For the x18 version, Byte “a” is associated with 10L, 10M, 11D 10L, 10M, 11J, Output DQa’s; Byte “b” is associated with DQb’s. For the x32 and x36 11E, 11F, 11G 11K, 11L, 11M versions, Byte “a” is associated with DQa’s; Byte “b” is associated (b) 2D, 2E, 2F, (b) 10D, 10E, DQb with DQb’s; Byte “c” is associated with DQc’s; Byte “d” is associated 2G, 1J, 1K, 10F, 10G, 11D, with DQd’s. Input data must meet setup and hold times around the 1L, 1M 11E, 11F, 11G rising edge of CLK. (c) 1D, 1E, 1F, DQc 1G, 2D, 2E, 2F, 2G, (d) 1J, 1K, 1L, DQd 1M, 2J, 2K, 2L, 2M 11C 11N NF/DQPa NF/ No Function/Parity Data I/Os: On the x32 version, these are No 1N 11C NF/DQPb I/O Function(NF). On the x18 version, Byte “a” parity is DQPa; Byte “b” – 1C NF/DQPc parity is DQPb. On the x36 version, Byte “a” parity is DQPa; Byte – 1N NF/DQPd “b” parity is DQPb; Byte “c” parity is DQPc; Byte “d” parity is DQPd. 1H, 2H, 4D, 1H, 2H, 4D, VDD Supply Power Supply: See DC Electrical Characteristics and Operating 4E, 4F, 4G, 4H, 4E, 4F, 4G, 4H, Conditions for range. 4J, 4K, 4L, 4M, 4J, 4K, 4L, 4M, 7N, 8D, 8E, 8F, 7N, 8D, 8E, 8F, 8G,8H, 8J, 8G,8H, 8J, 8K, 8L, 8M 8K, 8L, 8M 3C, 3D, 3E, 3F, 3C, 3D, 3E, 3F, VDDQ Supply Isolated Output Buffer Supply: See DC Electrical Characteristics and 3G, 3J, 3K, 3L, 3G, 3J, 3K, 3L, Operating Conditions for range. 3M, 3N, 9C, 3M, 3N, 9C, 9D, 9E, 9F, 9D, 9E, 9F, 9G, 9J, 9K, 9G, 9J, 9K, 9L, 9M, 9N 9L, 9M, 9N FBGA PIN DESCRIPTIONS (CONTINUED) (continued on next page) |
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