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LM3243 Datasheet(PDF) 20 Page - Texas Instruments

Part # LM3243
Description  LM3243 High-Current Step-Down Converter for 2G, 3G, and 4G RF Power Amplifiers
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM3243 Datasheet(HTML) 20 Page - Texas Instruments

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LM3243
SNVS782C – OCTOBER 2010 – REVISED AUGUST 2015
www.ti.com
10 Layout
10.1 Layout Guidelines
PC board layout is critical to successfully designing a DC-DC converter into a product. A properly planned board
layout optimizes the performance of a DC-DC converter and minimizes effects on surrounding circuitry while also
addressing manufacturing issues that can have adverse impacts on board quality and final product yield.
10.1.1 PCB Considerations
Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to
EMI, ground bounce, and resistive voltage loss in the traces. Erroneous signals could be sent to the DC-DC
converter device, resulting in poor regulation or instability. Poor layout can also result in re-flow problems leading
to poor solder joints between the DSBGA package and board pads. Poor solder joints can result in erratic or
degraded performance of the converter.
10.1.1.1 Energy Efficiency
Minimize resistive losses by using wide traces between the power components and doubling up traces on
multiple layers when possible
10.1.1.2 EMI
By its very nature, any switching converter generates electrical noise. The circuit board designer’s challenge is to
minimize, contain, or attenuate such switcher-generated noise. A high-frequency switching converter, such as the
LM3243, switches Ampere level currents within nanoseconds, and the traces interconnecting the associated
components can act as radiating antennas. The following guidelines are offered to help to ensure that EMI is
maintained within tolerable levels.
To help minimize radiated noise:
Place the LM3243 switcher, its input capacitor, and output filter inductor and capacitor close together, and
make the interconnecting traces as short as possible.
Arrange the components so that the switching current loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor, through the internal PFET of the LM3243 and the
inductor, to the output filter capacitor, then back through ground, forming a current loop. In the second half of
each cycle, current is pulled up from ground, through the internal synchronous NFET of the LM3243 by the
inductor, to the output filter capacitor and then back through ground, forming a second current loop. Routing
these loops so the current curls in the same direction prevents magnetic field reversal between the two half-
cycles and reduces radiated noise.
Make the current loop area(s) as small as possible. Interleave doubled traces with ground planes or return
paths, where possible, to further minimize trace inductances.
To help minimize conducted noise in the ground-plane:
Reduce the amount of switching current that circulates through the ground plane: Connect the ground bumps
of the LM3243 and its input filter capacitor together using generous component-side copper fill as a pseudo-
ground plane. Then connect this copper fill to the system ground-plane (if one is used) by multiple vias
located at the input filter capacitor ground terminal. The multiple vias help to minimize ground bounce at the
LM3243 by giving it a low-impedance ground connection.
To help minimize coupling to the DC-DC converter voltage feedback trace:
Route noise sensitive traces, such as the voltage feedback path (FB), as directly as possible from the
switcher FB pad to the VOUT pad of the output capacitor, but keep it away from noisy traces between the
power components.
To help minimize noise coupled back into power supplies:
Use a star connection to route from the VBATT power input to Switcher PVIN and to VBATT_PA.
Route traces for minimum inductance between supply pins and bypass capacitor(s).
Route traces to minimize inductance between bypass capacitors and the ground plane.
Maximize power supply trace inductance(s) to reduce coupling among function blocks.
Inserting a ferrite bead in-line with power supply traces can offer a favorable tradeoff in terms of board area,
by attenuating noise that might otherwise propagate through the supply connections, allowing the use of
20
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