8 30 Ps

3.4V

3.4V

3.4V

EN

VCON

0V

0A

< 200 mA

8 30 Ps

7 20 Ps

7 20 Ps

7 20 Ps

1V

1.7A

7 20 Ps

VCON = 0.4V

LM3243

SW

FB

EN

VCON

PGND

SGND

BP

ACB

GPIO

GPIO

MODE

PDM Output

DAC

10 µF

10 µF

4.7 µF

1.5 µH

BGND

LM3243

www.ti.com

SNVS782C – OCTOBER 2010 – REVISED AUGUST 2015

Figure 18. Dynamic Adjustment of Output Voltage With DAC or PDM

8.2.2.3.2

PDM-Based VCON Signal

Figure 18 shows the application circuit that enables the LM3243 to dynamically adjust the output voltage using a

GPIO pin from the system controller. Figure 19 shows the waveforms when adjusted dynamically. The PDM

signal of the GPIO is filtered using a low-pass filter and fed to the VCON pin. As the bitstream of the PDM signal

changes, the voltage on the VCON pin changes. Thus, the GPIO pin can be used to dynamically adjust the

output voltage. The double low-pass filter reduces the ripple at VCON to avoid any excessive VCON-induced

ripple at the output voltage.

Figure 19. Dynamic Adjustment of Output Voltage With GPIO

8.2.2.3.3

VCON Pin

Figure 20 shows the equivalent CRC circuit for the VCON pin. This circuit is internal to the part and should be

taken into consideration when driving this pin.

Copyright © 2010–2015, Texas Instruments Incorporated

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Product Folder Links: LM3243