LM3243

www.ti.com

SNVS782C – OCTOBER 2010 – REVISED AUGUST 2015

6.4 Thermal Information

LM3243

TMD (DSBGA)

UNIT

16 PINS

Junction-to-ambient thermal resistance

50

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise noted, all specifications apply to Typical System Application Diagram with: PVIN = VDD = EN = 3.8 V,

operating ambient temperature range (

(1) (2) (3)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Feedback voltage at low

0.35

0.40

0.45

V

setting

Feedback voltage at high

3.492

3.6

3.708

V

setting

Shutdown supply current

0.02

4

µA

DC bias current into VDD

260

310

µA

MODE = HIGH

DC bias current into VDD

975

1100

µA

MODE = LOW

Positive transient peak

1.9

2.1

A

current limit

Positive steady-state peak

VACB = 3.05 V

1.34

1.45

1.65

A

current limit

Positive active current assist

1.4

1.7

2

A

peak current limit

NFET switch negative peak

−1.69

−1.50

−1.31

A

current limit

Average Internal oscillator

VCON = 1 V

2.43

2.7

2.97

MHz

frequency

Logic HIGH input threshold

BP, EN, MODE

1.2

V

Logic LOW input threshold

BP, EN, MODE

0.5

V

EN pin pulldown current

EN = 3.6 V

0

5

10

µA

Pin input current

BP, MODE

–1

1

µA

VCON pin leakage current

VCON = 1 V

–1

1

µA

Gain

0.16 V

2.5

V/V

(1)

All voltages are with respect to the potential at the GND pins. The LM3243 is designed for mobile phone applications where turnon after

power up is controlled by the system controller and where requirements for a small package size overrule increased die size for internal

undervoltage lock-out (UVLO) circuitry. Thus, it should be kept in shutdown by holding the EN pin LOW until the input voltage exceeds

2.7 V.

(2)

Minimum and Maximum limits are specified by design, test, or statistical analysis.

(3)

The parameters in the electrical characteristics table are tested under open loop conditions at PVIN = VDD = 3.8 V. For performance

over the input voltage range and closed-loop results, refer to the datasheet curves.

(4)

Shutdown current includes leakage current of PFET.

(5)

(6)

Current limit is built-in, fixed, and not adjustable.

(7)

Linearity limits are ±3% or ±50 mV, whichever is larger.

Copyright © 2010–2015, Texas Instruments Incorporated

Submit Documentation Feedback

5

Product Folder Links: LM3243