V

OUT

V

REF(nom)

- 1

R = R

1

2

1.2 V

1.176 V

- 1 = 2.04 kW

= 100 kW

V

FB

R

2

> 5 A

R

< 242.4 k

m

W

®

2

TPS7A3401

SBVS163A – JUNE 2011 – REVISED MAY 2015

www.ti.com

Typical Application (continued)

8.2.2 Detailed Design Procedure

The first step when designing with a linear regulator is to examine the maximum load current along with the input

and output voltage requirements to determine if the device thermal and dropout voltage requirements can be

met. At 150 mA, the input dropout voltage of the TPS7A3401 family is a maximum of 800 mV over temperature;

therefore, the dropout headroom of 1.8 V is sufficient for operation over both input and output voltage accuracy.

The maximum power dissipated in the linear regulator is the maximum voltage dropped across the pass element

from the input to the output, multiplied by the maximum load current. In this example, the maximum voltage drop

calculated by taking this voltage drop multiplied by the maximum load current. For this example, the maximum

power dissipated in the linear regulator is 0.273 W, and is calculated using Equation 2.

(2)

Once the power dissipated in the linear regulator is known, the corresponding junction temperature rise can be

calculated. To calculate the junction temperature rise above ambient, the power dissipated must be multiplied by

the junction-to-ambient thermal resistance. This calculation gives the worst-case junction temperature; good

thermal design can significantly reduce this number. For thermal resistance information, refer to Thermal

Information. For this example, using the DGN package, the maximum junction temperature rise is calculated to

be 17.3°C. The maximum junction temperature rise is calculated by adding junction temperature rise to the

maximum ambient temperature, which is 75°C for this example. For this example, the designer calculates the

maximum junction temperature is 92.3°C. Keep in mind the maximum junction temperate must be less than

125°C for reliable device operation. Additional ground planes, added thermal vias, and air flow all help to lower

the maximum junction temperature.

Use the following equations to pick the rest of the components:

To ensure stability under no-load conditions, the current through the resistor network must be greater than 5 µA,

as shown in Equation 3.

(3)

(4)

Use a standard, 1%, 2.05-k

For this case, we select a 2.2-µF ceramic input capacitor to ensure that the input impedance is negligible to the

LDO control loop while keep the physical size and cost of the capacitor low; this component is a common-value

capacitor.

For better PSRR for this design, use a 10-µF input and output capacitor. To reduce the peaks from transients but

slow down the recovery time, increase the output capacitor size or add additional output capacitors.

8.2.2.1 Capacitor Recommendations

Low-ESR capacitors should be used for the input, output, noise reduction, and feed-forward capacitors. Ceramic

capacitors with X7R and X5R dielectrics are preferred. These dielectrics offer more stable characteristics.

Ceramic X7R capacitors offer improved overtemperature performance, while ceramic X5R capacitors are the

most cost-effective and are available in higher values.

High-ESR capacitors may degrade PSRR.

8.2.2.1.1

Input and Output Capacitor Requirements

The TPS7A3401 negative, high-voltage linear regulator achieves stability with a minimum input and output

capacitance of 2.2

μF; however, TI highly recommends using a 10-μF capacitor to maximize AC performance.

14

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