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PIC16F84A Datasheet(PDF) 73 Page - Microchip Technology |
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PIC16F84A Datasheet(HTML) 73 Page - Microchip Technology |
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73 / 124 page  PIC16F83/84 PIC16F8X © 1998 Microchip Technology Inc. DS30430C-page 73 10.0 ELECTRICAL CHARACTERISTICS FOR PIC16F83 AND PIC16F84 Absolute Maximum Ratings † Ambient temperature under bias.............................................................................................................-55 °C to +125°C Storage temperature .............................................................................................................................. -65 °C to +150°C Voltage on VDD with respect to VSS .......................................................................................................... -0.3 to +7.5V Voltage on MCLR with respect to VSS(2) ...................................................................................................... -0.3 to +14V Voltage on any pin with respect to VSS (except VDD and MCLR).................................................... -0.6V to (VDD + 0.6V) Total power dissipation(1) .....................................................................................................................................800 mW Maximum current out of VSS pin ...........................................................................................................................150 mA Maximum current into VDD pin ..............................................................................................................................100 mA Input clamp current, IIK (VI < 0 or VI > VDD) .....................................................................................................................± 20 mA Output clamp current, IOK (VO < 0 or VO > VDD) .............................................................................................................± 20 mA Maximum output current sunk by any I/O pin..........................................................................................................25 mA Maximum output current sourced by any I/O pin ....................................................................................................20 mA Maximum current sunk by PORTA ..........................................................................................................................80 mA Maximum current sourced by PORTA .....................................................................................................................50 mA Maximum current sunk by PORTB........................................................................................................................150 mA Maximum current sourced by PORTB...................................................................................................................100 mA Note 1: Power dissipation is calculated as follows: Pdis = VDD x {IDD - ∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOl x IOL) Note 2: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80 mA, may cause latch-up. Thus, a series resistor of 50-100 Ω should be used when applying a “low” level to the MCLR pin rather than pulling this pin directly to VSS. † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. |
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