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PIC16F84A Datasheet(PDF) 53 Page - Microchip Technology |
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PIC16F84A Datasheet(HTML) 53 Page - Microchip Technology |
53 / 124 page ![]() PIC16F8X © 1998 Microchip Technology Inc. DS30430C-page 53 9.0 INSTRUCTION SET SUMMARY Each PIC16CXX instruction is a 14-bit word divided into an OPCODE which specifies the instruction type and one or more operands which further specify the operation of the instruction. The PIC16CXX instruction set summary in Table 9-2 lists byte-oriented, bit-ori- ented, and literal and control operations. Table 9-1 shows the opcode field descriptions. For byte-oriented instructions, 'f' represents a file reg- ister designator and 'd' represents a destination desig- nator. The file register designator specifies which file register is to be used by the instruction. The destination designator specifies where the result of the operation is to be placed. If 'd' is zero, the result is placed in the W register. If 'd' is one, the result is placed in the file register specified in the instruction. For bit-oriented instructions, 'b' represents a bit field designator which selects the number of the bit affected by the operation, while 'f' represents the number of the file in which the bit is located. For literal and control operations, 'k' represents an eight or eleven bit constant or literal value. TABLE 9-1 OPCODE FIELD DESCRIPTIONS The instruction set is highly orthogonal and is grouped into three basic categories: • Byte-oriented operations • Bit-oriented operations • Literal and control operations All instructions are executed within one single instruc- tion cycle, unless a conditional test is true or the pro- gram counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles with the second cycle executed as a NOP. One instruc- tion cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the normal instruction execution time is 1 µs. If a conditional test is true or the program counter is changed as a result of an instruc- tion, the instruction execution time is 2 µs. Table 9-2 lists the instructions recognized by the MPASM assembler. Figure 9-1 shows the general formats that the instruc- tions can have. All examples use the following format to represent a hexadecimal number: 0xhh where h signifies a hexadecimal digit. FIGURE 9-1: GENERAL FORMAT FOR INSTRUCTIONS Field Description f Register file address (0x00 to 0x7F) W Working register (accumulator) b Bit address within an 8-bit file register k Literal field, constant data or label x Don't care location (= 0 or 1) The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all Microchip software tools. d Destination select; d = 0: store result in W, d = 1: store result in file register f. Default is d = 1 label Label name TOS Top of Stack PC Program Counter PCLATH Program Counter High Latch GIE Global Interrupt Enable bit WDT Watchdog Timer/Counter TO Time-out bit PD Power-down bit dest Destination either the W register or the specified register file location [ ] Options ( ) Contents → Assigned to < > Register bit field ∈ In the set of italics User defined term (font is courier) Note: To maintain upward compatibility with future PIC16CXX products, do not use the OPTION and TRIS instructions. Byte-oriented file register operations 13 8 7 6 0 d = 0 for destination W OPCODE d f (FILE #) d = 1 for destination f f = 7-bit file register address Bit-oriented file register operations 13 10 9 7 6 0 OPCODE b (BIT #) f (FILE #) b = 3-bit bit address f = 7-bit file register address Literal and control operations 13 8 7 0 OPCODE k (literal) k = 8-bit immediate value 13 11 10 0 OPCODE k (literal) k = 11-bit immediate value General CALL and GOTO instructions only |
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