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PIC16F84A Datasheet(PDF) 30 Page - Microchip Technology |
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PIC16F84A Datasheet(HTML) 30 Page - Microchip Technology |
30 / 124 page ![]() PIC16F8X DS30430C-page 30 © 1998 Microchip Technology Inc. FIGURE 6-5: TIMER0 TIMING WITH EXTERNAL CLOCK FIGURE 6-6: BLOCK DIAGRAM OF THE TMR0/WDT PRESCALER Increment TMR0 (Q4) Ext. Clock Input or Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 TMR0 T0 T0 + 1 T0 + 2 Ext. Clock/Prescaler Output After Sampling (Note 3) Note 1: 2: 3: Delay from clock input change to TMR0 increment is 3Tosc to 7Tosc. (Duration of Q = Tosc). Therefore, the error in measuring the interval between two edges on TMR0 input = ± 4Tosc max. External clock if no prescaler selected, Prescaler output otherwise. The arrows ↑ indicate where sampling occurs. A small clock pulse may be missed by sampling. Prescaler Out (Note 2) RA4/T0CKI T0SE pin M U X CLKOUT (= Fosc/4) SYNC 2 Cycles TMR0 register 8-bit Prescaler 8 - to - 1MUX M U X M U X Watchdog Timer PSA 0 1 0 1 WDT time-out PS2:PS0 8 Note: T0CS, T0SE, PSA, PS2:PS0 are bits in the OPTION_REG register. PSA WDT Enable bit M U X 0 1 0 1 Data Bus Set bit T0IF on overflow 8 PSA T0CS |
Similar Part No. - PIC16F84A |
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Similar Description - PIC16F84A |
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