IKCM15L60GA datasheet(5/16 Pages) INFINEON

Part #	IKCM15L60GA

Description	Control Integrated POwer System

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Manufacturer	INFINEON [Infineon Technologies AG]

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CIPOS™ IKCM15L60GA

Datasheet

5

Ver. 1.2, 2014-06-01

Pin Assignment

Pin Number

Pin Name

Pin Description

1

VS(U)

U-phase high side floating IC supply offset voltage

2

VB(U)

U-phase high side floating IC supply voltage

3

VS(V)

V-phase high side floating IC supply offset voltage

4

VB(V)

V-phase high side floating IC supply voltage

5

VS(W)

W-phase high side floating IC supply offset voltage

6

VB(W)

W-phase high side floating IC supply voltage

7

HIN(U)

U-phase high side gate driver input

8

HIN(V)

V-phase high side gate driver input

9

HIN(W)

W-phase high side gate driver input

10

LIN(U)

U-phase low side gate driver input

11

LIN(V)

V-phase low side gate driver input

12

LIN(W)

W-phase low side gate driver input

13

VDD

Low side control supply

14

VFO

Fault output / Temperature monitor

15

ITRIP

Over current shutdown input

16

VSS

Low side control negative supply

17

NW

W-phase low side emitter

18

NV

V-phase low side emitter

19

NU

U-phase low side emitter

20

W

Motor W-phase output

21

V

Motor V-phase output

22

U

Motor U-phase output

23

P

Positive bus input voltage

24

NC

No Connection

Pin Description

HIN(U,V,W) and LIN(U,V,W) (Low side and high

side control pins, Pin 7 - 12)

These pins are positive logic and they are

responsible for the control of the integrated IGBT.

The Schmitt-trigger input thresholds of them are

such to guarantee LSTTL and CMOS compatibility

down to 3.3V controller outputs. Pull-down resistor

of about 5kΩ is internally provided to pre-bias inputs

during supply start-up and a zener clamp is

provided for pin protection purposes. Input Schmitt-

trigger and noise filter provide beneficial noise

rejection to short input pulses.

The noise filter suppresses control pulses which are

below the filter time tFILIN. The filter acts according to

Figure 4.

UZ=10.5V

INPUT NOISE

FILTER

Ω

≈

k

5

Schmitt-Trigger

SΩITCH LEVEL

VIH; VIL

LINx

HINx

Figure 3: Input pin structure

HIN

LIN

HO

LO

low

high

tFILIN

a)

b)

HIN

LIN

HO

LO

Figure 4: Input filter timing diagram

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