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TMP411-Q1 Datasheet(PDF) 22 Page - Texas Instruments |
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TMP411-Q1 Datasheet(HTML) 22 Page - Texas Instruments |
22 / 40 page ![]() TMP411-Q1 SBOS527F – DECEMBER 2010 – REVISED NOVEMBER 2013 www.ti.com SERIAL INTERFACE READ/WRITE OPERATIONS The TMP411-Q1 operates only as a slave device on Accessing a particular register on the TMP411-Q1 is either the two-wire bus or the SMBus. Connections to accomplished by writing the appropriate value to the either bus are made via the open-drain I/O lines, SDA Pointer Register. The value for the Pointer Register is and SCL. The SDA and SCL pins feature integrated the first byte transferred after the slave address byte spike suppression filters and Schmitt triggers to with the R/W bit low. Every write operation to the minimize the effects of input spikes and bus noise. TMP411-Q1 requires a value for the Pointer Register The TMP411-Q1 supports the transmission protocol (see Figure 14). for fast (1-kHz to 400-kHz) and high-speed (1-kHz to When reading from the TMP411-Q1, the last value 3.4-MHz) modes. All data bytes are transmitted MSB- stored in the Pointer Register by a write operation is first. used to determine which register is read by a read operation. To change the register pointer for a read SERIAL BUS ADDRESS operation, a new value must be written to the Pointer To communicate with the TMP411-Q1, the master Register. This transaction is accomplished by issuing must first address slave devices via a slave address a slave address byte with the R/W bit low, followed byte. The slave address byte consists of seven by the Pointer Register byte. No additional data are address bits, and a direction bit indicating the intent required. The master can then generate a START of executing a read or write operation. The address of condition and send the slave address byte with the the TMP411A-Q1 and TMP411D-Q1 is 4Ch (1001 R/W bit high to initiate the read command. See 100b). Figure 15 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to continually send the Pointer Register bytes, because the TMP411-Q1 retains the Pointer Register value until it is changed by the next write operation. Note that register bytes are sent MSB-first, followed by the LSB. Table 12. THERM Hysteresis Register Format THERM HYSTERESIS REGISTER (Read = 21h, Write = 21h, POR = 0Ah) BIT # D7D7 D6D6 D5D5 D4D4 D3D3 D2D2 D1D1 D0D0 BIT NAME TH11 TH10 TH9 TH8 TH7 TH6 TH5 TH4 POR VALUE 0 0 0 0 1 0 1 0 22 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: TMP411-Q1 |
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