±15kV ESD-Protected, Slew-Rate-Limited,

Low-Power, RS-485/RS-422 Transceivers

8

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MAX488E

MAX490E

TOP VIEW

1

2

3

4

RO

DI

GND

8

7

6

5

A

B

Z

Y

DIP/SO

R

D

Rt

Rt

5

6

7

8

RO

DI

GND

4 GND

DI

RO

3

2

A

B

Y

Z

DR

R

D

1

0.1

µF

NOTE: TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.

MAX489E

MAX491E

DIP/SO

TOP VIEW

Rt

Rt

DE

RE

GND

GND

DE

RO

DI

9

10

12

11

B

A

Z

Y

0.1

µF

5

RO

NC

DI

2

1, 8, 13

3

6, 7

14

4

1

2

3

4

5

6

7

14

13

12

11

10

9

8

N.C.

N.C.

A

B

Z

Y

N.C.

RO

RE

DE

DI

GND

GND

R

D

D

RD

R

Figure 2. MAX488E/MAX490E Pin Configuration and Typical Operating Circuit

Figure 3. MAX489E/MAX491E Pin Configuration and Typical Operating Circuit

MAX481E

MAX483E

MAX485E

MAX487E

MAX1487E

TOP VIEW

NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORM DIAGRAMS REFER TO PINS A AND B WHEN DE IS HIGH.

TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.

1

2

3

4

8

5

0.1

µF

GND

DI

DE

RE

RO

R

D

Rt

Rt

7

6

D

R

DE

RE

DI

RO

A

B

1

2

3

4

8

7

6

5

B

A

GND

DI

DE

RE

RO

DIP/SO

R

D

B

A

Figure 1. MAX481E/MAX483E/MAX485E/MAX487E/MAX1487E Pin Configuration and Typical Operating Circuit