M13S2561616A-2S datasheet(31/49 Pages) ESMT

Part #	M13S2561616A-2S

Description	Double-data-rate architecture, two data transfers per clock cycle

Download	49 Pages

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Manufacturer	ESMT [Elite Semiconductor Memory Technology Inc.]

Direct Link	http://www.esmt.com.tw/index.asp

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31 / 49 page

ESMT

M13S2561616A (2S)

Operation Temperature Condition -40°C~85°C

Elite Semiconductor Memory Technology Inc.

Publication Date : Jan. 2015

Revision : 1.0

31/49

Timing Diagram

Basic Timing (Setup, Hold and Access Time @ BL=4, CL=3)

CK E

CS

RA S

CA S

BA 0 , B A 1

AD D R

(A 0 ~ A n )

WE

DQ S

DQ

01

23

4

5

6

7

8

9

10

HI GH

DM

CO M M A N D

A 10 /A P

BAa

BAb

Cb

Db 0

Db 1

Db 3

Db 2

t CK

t IS

t IH

t DQ S C K

t RP RE

t DQ S C K

Qa 0

Q a 1

Qa 2

Q a 3

t RP S T

t D QSS

tWPRE

t DQ S H

t DQ SL

tDS tDH tDS tDH

t WP S T

Hi -Z

Hi - Z

READ

WRITE

CL K

t CL

t CH

t CK

t CL

t CH

BAa

Ra

Ca

Ra

ACTIVE

t DQ S Q

t QH

:D o n ’ t c a r e

Hi -Z

t LZ

t AC

t HZ

tWPRES

10 1 2 2 B 16 R. B 1

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