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M13S2561616A-2S Datasheet(PDF) 25 Page - Elite Semiconductor Memory Technology Inc. |
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M13S2561616A-2S Datasheet(HTML) 25 Page - Elite Semiconductor Memory Technology Inc. |
25 / 49 page ESMT M13S2561616A (2S) Operation Temperature Condition -40°C~85°C Elite Semiconductor Memory Technology Inc. Publication Date : Jan. 2015 Revision : 1.0 25/49 Read With Auto Precharge If a read with auto precharge command is initiated, the DDR SDRAM automatically enters the precharge operation BL/2 clock later from a read with auto precharge command when tRAS (min) is satisfied. If not, the start point of precharge operation will be delayed until tRAS (min) is satisfied. Once the precharge operation has started the bank cannot be reactivated and the new command can not be asserted until the precharge time (tRP) has been satisfied. <Burst Length = 4, CAS Latency = 2.5> 01 234 567 8 9 CO M M A N D Bank A ACTIVE NO P NO P NO P NO P NO P NO P NO P Read A Auto Precharge CL K CL K CAS Latency = 2.5 t RP NO P * Bank can be reactivated at completion of precharge Auto-Precharge starts t RA S ( m i n ) DQ S DQ 's DOUT 0 Hi- Z Hi- Z DOUT 1 DOUT 2 DOUT 3 When the Read with Auto Precharge command is issued, new command can be asserted at 4, 5 and 6 respectively as follow. For the same bank For the different bank Asserted Command 4 5 6 4 5 6 READ READ Illegal Illegal Legal Legal Legal READ with AP *1 READ with AP Illegal Illegal Legal Legal Legal Active Illegal Illegal Illegal Legal Legal Legal Precharge Legal Legal Illegal Legal Legal Legal Note 1: AP = Auto Precharge |
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