M13L2561616A-2A datasheet(49/49 Pages) ESMT

Part #	M13L2561616A-2A

Description	Double-data-rate architecture, two data transfers per clock cycle

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Manufacturer	ESMT [Elite Semiconductor Memory Technology Inc.]

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ESMT

M13L2561616A (2A)

Elite Semiconductor Memory Technology Inc.

Publication Date : Sep. 2012

Revision : 1.0

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The contents contained in this document are believed to be accurate at the time

of publication. ESMT assumes no responsibility for any error in this document,

and reserves the right to change the products or specification in this document

without notice.

The information contained herein is presented only as a guide or examples for

the application of our products. No responsibility is assumed by ESMT for any

infringement of patents, copyrights, or other intellectual property rights of third

parties which may result from its use. No license, either express , implied or

otherwise, is granted under any patents, copyrights or other intellectual property

rights of ESMT or others.

Any semiconductor devices may have inherently a certain rate of failure. To

minimize risks associated with customer's application, adequate design and

operating safeguards against injury, damage, or loss from such failure, should be

provided by the customer when making application designs.

ESMT's products are not authorized for use in critical applications such as, but

not limited to, life support devices or system, where failure or abnormal operation

may directly affect human lives or cause physical injury or property damage. If

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must do its own quality assurance testing appropriate to such applications.

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