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M13L32321A-2G Datasheet(PDF) 3 Page - Elite Semiconductor Memory Technology Inc. |
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M13L32321A-2G Datasheet(HTML) 3 Page - Elite Semiconductor Memory Technology Inc. |
3 / 48 page ESMT M13L32321A (2G) Elite Semiconductor Memory Technology Inc. Publication Date : Oct. 2012 Revision : 1.0 3/48 BALL CONFIGURATION (TOP VIEW) (BGA144, 12mmX12mmX1.4mm Body, 0.8mm Ball Pitch) DQS0 VSS Thermal DQ4 DQ6 DQ7 DQ17 DQ19 DQS2 DQ21 DQ22 CAS CS RAS DM0 VDDQ DQ5 VDDQ DQ16 DQ18 DM2 DQ20 DQ23 WE NC NC VSSQ NC VSSQ VDD VDDQ VDDQ NC VDDQ VDDQ VDD BA NC DQ3 VDDQ VSSQ VSS VSSQ VSS A0 NC 23 45 6 7 89 VSSQ VSSQ VSSQ VSSQ DQ2 DQ1 VSSQ VSSQ VSS A10 A1 A2 DQ0 VDDQ VDD VSS VSS VDD A3 NC DQ31 VDDQ VDD VSS A4 A9 DQ29 DQ30 VSSQ VSSQ NC A6 A5 VSS VSS Thermal VSS Thermal VSS Thermal VSS Thermal VSS Thermal VSS Thermal VSS Thermal VSS Thermal VSS Thermal VSS Thermal VSS Thermal VSS VDD VSS Thermal VSS Thermal VSS Thermal VSS Thermal 10 DQ28 VDDQ VSSQ VSS VSS A7 NC VSSQ NC VSSQ VDD VDD A8/AP CLK DM3 VDDQ DQ26 VDDQ CKE CLK DQS3 DQ27 DQ25 DQ24 NC VREF NC DQ8 VDDQ NC DQ15 DQ13 DM1 DQ11 DQ9 NC DQ14 DQ12 DQS1 DQ10 VSSQ VSSQ VSSQ VSSQ VSSQ 11 12 VDDQ VDDQ VDDQ 13 B C D E F G H J K L M N Pin Description Pin Name Function Pin Name Function A0~A10, BA Address inputs - Row address A0~A10 - Column address A0~A7 A8/AP : AUTO Precharge BA : Bank select (2 Banks) DM0~DM3 DM is an input mask signal for write data. DM0 corresponds to the data on DQ0~DQ7; DM1 corresponds to the data on DQ8~DQ15; DM2 corresponds to the data on DQ16~DQ23; DM3 corresponds to the data on DQ24~DQ31. DQ0~DQ31 Data-in/Data-out CLK, CLK Clock input RAS Row address strobe CKE Clock enable CAS Column address strobe CS Chip select WE Write enable VDDQ Supply Voltage for DQ VSS Ground VSSQ Ground for DQ VDD Power VREF Reference Voltage DQS0~DQS3 Bi- directional Data Strobe. DQS0 correspond to the data on DQ0~DQ7; DQS1 correspond to the data on DQ8~DQ15; DQS2 correspond to the data on DQ16~DQ23; DQS3 correspond to the data on DQ24~DQ31. NC No connection |
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