M30620FCAFP datasheet(234/274 Pages) MITSUBISHI

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Functions To Inhibit Rewriting Flash Memory Version (Flash Memory Version)

Mitsubishi microcomputers

M16C / 62A Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

234

Symbol

Address

When reset

ROMCP

0FFFFF16

FF16

ROM code protect level

2 set bit (Note 1, 2)

00: Protect enabled

01: Protect enabled

10: Protect enabled

11: Protect disabled

ROM code protect control address

Bit name

Function

Bit symbol

00: Protect removed

01: Protect set bit effective

10: Protect set bit effective

11: Protect set bit effective

00: Protect enabled

01: Protect enabled

10: Protect enabled

11: Protect disabled

ROM code protect reset

bit (Note 3)

ROM code protect level

1 set bit (Note 1)

ROMCP2

ROMCR

ROMCP1

b3 b2

b5 b4

b7 b6

Note 1: When ROM code protect is turned on, the on-chip flash memory is protected against

readout or modification in parallel input/output mode.

Note 2: When ROM code protect level 2 is turned on, ROM code readout by a shipment

inspection LSI tester, etc. also is inhibited.

Note 3: The ROM code protect reset bits can be used to turn off ROM code protect level 1 and

ROM code protect level 2. However, since these bits cannot be changed in parallel input/

output mode, they need to be rewritten in serial input/output or some other mode.

Reserved bit

Always set this bit to 1.

Functions To Inhibit Rewriting Flash Memory Version

To prevent the contents of the flash memory version from being read out or rewritten easily, the device

incorporates a ROM code protect function for use in parallel I/O mode and an ID code check function for

use in standard serial I/O mode.

ROM code protect function

The ROM code protect function reading out or modifying the contents of the flash memory version by

using the ROM code protect control address (0FFFFF16) during parallel I/O mode. Figure 1.27.1 shows

the ROM code protect control address (0FFFFF16). (This address exists in the user ROM area.)

If one of the pair of ROM code protect bits is set to 0, ROM code protect is turned on, so that the contents

of the flash memory version are protected against readout and modification. ROM code protect is imple-

mented in two levels. If level 2 is selected, the flash memory is protected even against readout by a

shipment inspection LSI tester, etc. When an attempt is made to select both level 1 and level 2, level 2 is

selected by default.

If both of the two ROM code protect reset bits are set to “00,” ROM code protect is turned off, so that the

contents of the flash memory version can be read out or modified. Once ROM code protect is turned on,

the contents of the ROM code protect reset bits cannot be modified in parallel I/O mode. Use the serial I/

O or some other mode to rewrite the contents of the ROM code protect reset bits.

Figure 1.27.1. ROM code protect control address

M30620FCAFP Datasheet(PDF) 234 Page - Mitsubishi Electric Semiconductor

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