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LTC2755 Datasheet(PDF) 16 Page - Linear Technology |
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LTC2755 Datasheet(HTML) 16 Page - Linear Technology |
16 / 24 page ![]() LTC2755 16 2755f System Offset Adjustment Many systems require compensation for overall system offset. The RVOSX offset adjustment pins are provided for this purpose. For noise immunity and ease of adjustment, the control voltage is attenuated to the DAC output: VOS = –0.01 • V(RVOSX) [0V to 5V, ±2.5V spans] VOS = –0.02 • V(RVOSX) [0V to 10V, ±5V, –2.5V to 7.5V spans] VOS = –0.04 • V(RVOSX) [±10V span] The nominal input range of this pin is ±5V; other reference voltages of up to ±15V may be used if needed. The RVOSX pins have an input impedance of 1MΩ. To preserve the settling performance of the LTC2755, drive this pin with a Thevenin-equivalent impedance of 10k or less. Short any unused RVOSX system offset adjustment pins to GND. Table 2. Span Codes S2 S1 S0 SPAN 0 0 0 Unipolar 0V to 5V 0 0 1 Unipolar 0V to 10V 0 1 0 Bipolar –5V to 5V 0 1 1 Bipolar –10V to 10V 1 0 0 Bipolar –2.5V to 2.5V 1 0 1 Bipolar –2.5V to 7.5V Codes not shown are reserved and should not be used. Table 3. Address Codes A2 A1 A0 DAC CHANNEL 0 0 0 DAC A 0 0 1 DAC B 0 1 0 DAC C 0 1 1 DAC D 1 1 1 ALL DACs* Codes not shown are reserved and should not be used. *If readback is taken using the ALL DACs address, the LTC2755 defaults to DAC A. OPERATION |
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