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LTC2755 Datasheet(PDF) 9 Page - Linear Technology |
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LTC2755 Datasheet(HTML) 9 Page - Linear Technology |
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9 / 24 page  LTC2755 9 2755f Midscale Glitch TYPICAL PERFORMANCE CHARACTERISTICS T A = 25°C, unless otherwise noted. LTC2755-12, LTC2755-14, LTC2755-16 PIN FUNCTIONS S2 (Pin 1): Span I/O Bit 2. Pins S0, S1 and S2 are used to program and to read back the output ranges of the DACs. IOUT2A (Pin 2): DAC A Current Output Complement. Tie IOUT2A to ground. GND (Pin 3): Shield Ground, provides necessary shielding for IOUT2A. Tie to ground. D3-D11 (Pins 4-12): LTC2755-12 Only. DAC Input/Output Data Bits. These I/O pins set and read back the DAC code. D11 is the MSB. D5-D13 (Pins 4-12): LTC2755-14 Only. DAC Input/Output Data Bits. These I/O pins set and read back the DAC code. D13 is the MSB. D7-D15 (Pins 4-12): LTC2755-16 Only. DAC Input/Output Data Bits. These I/O pins set and read back the DAC code. D15 is the MSB. GND (Pin 13): Shield Ground, provides necessary shielding for IOUT2D. Tie to ground. IOUT2D (Pin 14): DAC D Current Output Complement. Tie IOUT2D to ground. VDD (Pin 15): Positive Supply Input; 2.7V ≤ VDD ≤ 5.5V. Requires a 0.1μF bypass capacitor to GND. A2 (Pin 16): DAC Address Bit 2. See Table 3. A1 (Pin 17): DAC Address Bit 1. See Table 3. A0 (Pin 18): DAC Address Bit 0. See Table 3. GND (Pin 19): Ground. Tie to ground. CLR (Pin 20): Asynchronous Clear. When CLR is taken to a logic low, the data registers are reset to the zero-volt code (VOUT = 0V) for the present output range. REFD (Pin 21): Reference Input for DAC D. The imped- ance looking into this pin is 10k to ground. For normal operation tie this pin to the negative reference voltage at the output of reference inverting amplifier A2 (see Typical Applications). Typically –5V; accepts up to ±15V. ROFSD (Pin 22): Bipolar Offset Network for DAC D. This pin provides the translation of the output voltage range for bipolar spans. Accepts up to ±15V; for normal operation tie to the positive reference voltage at RIN2 (Pin 32). The impedance looking into this pin is 20k to ground. RFBD (Pin 23): DAC D Feedback Resistor. For normal operation tie to the output of the I/V converter amplifier for DAC D (see Typical Applications). The DAC output current from IOUT1D flows through the feedback resistor to the RFBD pin. The impedance looking into this pin is 10k to ground. IOUT1D (Pin 24): DAC D Current Output. This pin is a virtual ground when the DAC is operating and should reside at 0V. For normal operation tie to the negative input of the I/V converter amplifier for DAC D (see Typical Applications). 500ns/DIV UPD 5V/DIV GATED SETTLING WAVEFORM 250μV/DIV 2755 G10 USING LT1469 AMP CFEEDBACK = 12pF 0V TO 10V STEP Settling 0V to 10V 500ns/DIV 2755 G20 RISING MAJOR CARRY TRANSITION. FALLING TRANSITION IS SIMILAR OR BETTER. UPD 5V/DIV VOUT 2mV/DIV UNIPOLAR 5V OUTPUT RANGE LT1469 OUTPUT AMPLIFIER CFEEDBACK = 27pF VDD = 5V, VREF = 5V 1nV • s TYP |
Similar Part No. - LTC2755_15 |
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Similar Description - LTC2755_15 |
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