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LMU112PC25 Datasheet(PDF) 2 Page - LOGIC Devices Incorporated |
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LMU112PC25 Datasheet(HTML) 2 Page - LOGIC Devices Incorporated |
2 / 6 page DEVICES INCORPORATED LMU112 12 x 12-bit Parallel Multiplier Multipliers 08/16/2000–LDS.112-K 2 FIGURE 1A.INPUT FORMATS 11 10 9 2 1 0 –2 0 (Sign) 2 –1 2–2 2 –9 2–10 2–11 11 10 9 2 1 0 –2 0 (Sign) 2 –1 2–2 2 –9 2–10 2–11 Fractional Two’s Complement (TC = 1) 11 10 9 2 1 0 –2 11 (Sign) 2 10 2 9 2 2 2 1 2 0 11 10 9 2 1 0 –2 11 (Sign) 2 10 2 9 2 2 2 1 2 0 Integer Two’s Complement (TC = 1) 11 10 9 2 1 0 2 –1 2–2 2–3 2 –10 2–11 2–12 11 10 9 2 1 0 2 –1 2–2 2–3 2 –10 2–11 2–12 Unsigned Fractional (TC = 0) 11 10 9 2 1 0 2 11 210 29 2 2 2 1 2 0 11 10 9 2 1 0 2 11 210 29 2 2 2 1 2 0 Unsigned Integer (TC = 0) AIN BIN FIGURE 1B.OUTPUT FORMATS 23 22 21 14 13 12 –2 0 (Sign) 2 –1 2–2 2 –9 2–10 2–11 11 10 9 8 2 –12 2–13 2–14 2–15 Fractional Two’s Complement Integer Two’s Complement Unsigned Fractional Unsigned Integer MSP LSP 23 22 21 14 13 12 –2 22 (Sign) 2 21 220 2 13 212 211 11 10 9 8 2 10 2 9 2 8 2 7 23 22 21 14 13 12 2 –1 2–2 2–3 2 –10 2–11 2–12 11 10 9 8 2 –13 2–14 2–15 2–16 23 22 21 14 13 12 2 23 222 221 2 14 213 212 11 10 9 8 2 11 2 10 2 9 2 8 |
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