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LT1720 Datasheet(PDF) 15 Page - Linear Technology |
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LT1720 Datasheet(HTML) 15 Page - Linear Technology |
15 / 28 page 15 LT1720/LT1721 APPLICATIONS INFORMATION 56% low duty cycle, sufficient to allow 2ns between the high pulses. Figure 10 shows the two outputs. The optional A1 feedback network shown can be used to force identical output duty cycles. The steady state duty cycles of both outputs will be 44%. Note, though, that the addition of this network only adjusts the percentage of time each output is high to be the same, which can be important in switching circuits requiring identical settling times. It cannot adjust the relative phases between the two outputs to be exactly 180° apart, because the signal at the input node driven by the crystal is not a pure sinusoid. SUPPLY VOLTAGE (V) 2.5 4.5 6.0 1000 800 600 400 200 0 1720/21 F08 3.5 5.5 3.0 4.0 5.0 Figure 8. Timing Skew of Figure 7’s Circuit – + – + – + C1 1/2 LT1720 C2 1/2 LT1720 A1 LT1636 VCC 2.7V TO 6V 2k 620 Ω 220 Ω 10MHz CRYSTAL (AT-CUT) 100k 100k 2.2k 1.3k 2k 1k 1720/21 F09 0.1 µF 0.1 µF 0.1 µF OUTPUT 0 OUTPUT 1 GROUND CASE OPTIONAL— SEE TEXT Figure 9. Crystal-Based Nonoverlapping 10MHz Clock Generator 20ns/DIV Q0 2V/DIV Q1 2V/DIV Figure 10. Nonoverlapping Outputs of Figure 9's Circuit applications. This circuit works well because of the two matched delays and rail-to-rail style outputs of the LT1720. The circuit in Figure 9 shows a crystal oscillator circuit that generates two nonoverlapping clocks by making full use of the two independent comparators of the LT1720. C1 oscillates as before, but with a lower reference level, C2’s output will toggle at different times. The resistors set the degree of separation between the output’s high pulses. With the values shown, each output has a 44% high and |
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