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LT1720 Datasheet(PDF) 14 Page - Linear Technology |
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LT1720 Datasheet(HTML) 14 Page - Linear Technology |
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14 / 28 page  14 LT1720/LT1721 – + – + – + C1 1/2 LT1720 C2 1/2 LT1720 A1 LT1636 VCC 2.7V TO 6V 2k 620 Ω 220 Ω 1MHz TO 10MHz CRYSTAL (AT-CUT) 100k 100k 1720 F07 1.8k 2k 1k 0.1 µF 0.1 µF 0.1 µF OUTPUT OUTPUT GROUND CASE Figure 7. Crystal Oscillator with Complementary Outputs and 50% Duty Cycle APPLICATIONS INFORMATION fast enough that the absolute dispersion of 2.5ns (= 7 – 4.5) is often small enough to ignore. The gain and hysteresis stage of the LT1720/LT1721 is simple, short and high speed to help prevent parasitic oscillations while adding minimum dispersion. This in- ternal “self-latch” can be usefully exploited in many applications because it occurs early in the signal chain, in a low power, fully differential stage. It is therefore highly immune to disturbances from other parts of the circuit, either in the same comparator, on the supply lines, or from the other comparator(s) in the same package. Once a high speed signal trips the hysteresis, the output will respond, after a fixed propagation delay, without regard to these external influences that can cause trouble in nonhysteretic comparators. ±VTRIP Test Circuit The input trip points are tested using the circuit shown in the Test Circuits section that precedes this Applications Information section. The test circuit uses a 1kHz triangle wave to repeatedly trip the comparator being tested. The LT1720/LT1721 output is used to trigger switched capaci- tor sampling of the triangle wave, with a sampler for each direction. Because the triangle wave is attenuated 1000:1 and fed to the LT1720/LT1721’s differential input, the sampled voltages are therefore 1000 times the input trip voltages. The hysteresis and offset are computed from the trip points as shown. Crystal Oscillators A simple crystal oscillator using one comparator of an LT1720/LT1721 is shown on the first page of this data sheet. The 2k-620 Ω resistor pair set a bias point at the comparator’s noninverting input. The 2k-1.8k-0.1 µF path sets the inverting input node at an appropriate DC average level based on the output. The crystal’s path provides resonant positive feedback and stable oscillation occurs. Although the LT1720/LT1721 will give the correct logic output when one input is outside the common mode range, additional delays may occur when it is so operated, opening the possibility of spurious operating modes. Therefore, the DC bias voltages at the inputs are set near the center of the LT1720/LT1721’s common mode range and the 220 Ω resistor attenuates the feedback to the noninverting input. The circuit will operate with any AT-cut crystal from 1MHz to 10MHz over a 2.7V to 6V supply range. As the power is applied, the circuit remains off until the LT1720/LT1721 bias circuits activate, at a typical VCC of 2V to 2.2V (25 °C), at which point the desired frequency output is generated. The output duty cycle for this circuit is roughly 50%, but it is affected by resistor tolerances and, to a lesser extent, by comparator offsets and timings. If a 50% duty cycle is required, the circuit of Figure 7 creates a pair of comple- mentary outputs with a forced 50% duty cycle. Crystals are narrow-band elements, so the feedback to the nonin- verting input is a filtered analog version of the square wave output. Changing the noninverting reference level can there- fore vary the duty cycle. C1 operates as in the previous example, whereas C2 creates a complementary output by comparing the same two nodes with the opposite input polarity. A1 compares band-limited versions of the out- puts and biases C1’s negative input. C1’s only degree of freedom to respond is variation of pulse width; hence the outputs are forced to 50% duty cycle. Again, the circuit operates from 2.7V to 6V, and the skew between the edges of the two outputs are shown in Figure 8. There is a slight duty cycle dependence on comparator loading, so equal capacitive and resistive loading should be used in critical |
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