LT1074/LT1076

5

A switch cycle in the LT1074 is initiated by the oscillator

setting the R/S latch. The pulse that sets the latch also

locks out the switch via gate G1. The effective width of this

pulse is approximately 700ns, which sets the maximum

switch duty cycle to approximately 93% at 100kHz switch-

ing frequency. The switch is turned off by comparator C1,

which resets the latch. C1 has a sawtooth waveform as one

input and the output of an analog multiplier as the other

input. The multiplier output is the product of an internal

reference voltage, and the output of the error amplifier, A1,

divided by the regulator input voltage. In standard buck

regulators, this means that the output voltage of A1

required to keep a constant regulated output is indepen-

dent of regulator input voltage. This greatly improves line

transient response, and makes loop gain independent of

input voltage. The error amplifier is a transconductance

current going positive is 140

µA, while negative slew

current is about 1.1mA. This asymmetry helps prevent

overshoot on start-up. Overall loop frequency compensa-

ground.

Switch current is continuously monitored by C2, which

resets the R/S latch to turn the switch off if an overcurrent

condition occurs. The time required for detection and

switch turn off is approximately 600ns. So minimum

switch “on” time in current limit is 600ns. Under dead

shorted output conditions, switch duty cycle may have to

be as low as 2% to maintain control of output current. This

would require switch on time of 200ns at 100kHz switch-

ing frequency, so frequency is reduced at very low output

voltages by feeding the FB signal into the oscillator and

creating a linear frequency downshift when the FB signal

drops below 1.3V. Current trip level is set by the voltage on

source. When this pin is left open, it self-clamps at about

4.5V and sets current limit at 6.5A for the LT1074 and 2.6A

for the LT1076. In the 7-pin package an external resistor

current limit. A capacitor in parallel with this resistor will

soft-start the current limit. A slight offset in C2 guarantees

C2 output will stay high and force switch duty cycle to zero.

The “Shutdown” pin is used to force switch duty cycle to

the regulator. Threshold for the former is approximately

2.35V, and for complete shutdown, approximately 0.3V.

Total supply current in shutdown is about 150

µA. A 10µA

pull-up current forces the shutdown pin high when left

open. A capacitor can be used to generate delayed start-

up. A resistor divider will program “undervoltage lockout”

if the divider voltage is set at 2.35V when the input is at the

desired trip point.

The switch used in the LT1074 is a Darlington NPN (single

NPN for LT1076) driven by a saturated PNP. Special

patented circuitry is used to drive the PNP on and off very

quickly even from the saturation state. This particular

switch arrangement has no “isolation tubs” connected to

the switch output, which can therefore swing to 40V below

ground.

BLOCK DIAGRA

DESCRIPTIO