PALCE22V10 and PALCE22V10Z Families

33

CONNECTION DIAGRAMS

Top View

4

5

6

7

8

9

10

11

3

2

1

28 27 26

25

24

23

22

21

20

19

12 13 14 15 16 17 18

NC

GND/NC *

SKINNYDIP/SOIC

PIN DESIGNATIONS

CLK

= Clock

GND = Ground

I

= Input

I/O

= Input/Output

NC

= No Connect

Note:

Pin 1 is marked for orientation.

PLCC

*For -5, this pin must be grounded for guaranteed data sheet performance. If not grounded, AC timing may degrade

by about 10%.

16564E-002

16564E-003

VCC

I1

I3

I5

I7

I9

GND

I/O9

I/O7

I/O5

I/O3

I/O1

I11

I/O8

I/O6

I/O4

I/O2

I/O0

CLK/I0

I2

I4

I6

I8

I10

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13