M37225M6_15 datasheet(26/128 Pages) RENESAS

Part #	M37225M6

Description	SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER

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Manufacturer	RENESAS [Renesas Technology Corp]

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M37225M6/M8/MA/MC-XXXSP, M37225ECSP

Rev.1.00

Nov 01, 2000

page 24 of 124

REJ03B0136-0100Z

8.4 TIMERS

This microcomputer has 4 timers: timers 1 to 4. All timers are 8-bit

timers with the 8-bit timer latch. The timer block diagram is shown in

Figure 8.4.3.

All of the timers count down and their divide ratio is 1/(n+1), where n

is the value of timer latch. By writing a count value to the correspond-

ing timer latch (addresses 00F016 to 00F316 : timers 1 to 4), the value

is also set to a timer, simultaneously.

The count value is decremented by 1. The timer interrupt request bit

is set to “1” by a timer overflow at the next count pulse, after the

count value reaches “0016.”

8.4.1 Timer 1

Timer 1 can select one of the following count sources:

• f(XIN)/16

• f(XIN)/4096 or f(XCIN)/4096

The count source of timer 1 is selected by setting bit 0 of timer mode

register 1 (address 00F416).

Timer 1 interrupt request occurs at timer 1 overflow.

8.4.2 Timer 2

Timer 2 can select one of the following count sources:

• f(XIN)/16

• Timer 1 overflow signal

• External clock from the TIM2 pin

The count source of timer 2 is selected by setting bits 4 and 1 of

timer mode register 1 (address 00F416). When timer 1 overflow sig-

nal is a count source for the timer 2, the timer 1 functions as an 8-bit

prescaler.

Timer 2 interrupt request occurs at timer 2 overflow.

8.4.3 Timer 3

Timer 3 can select one of the following count sources:

• f(XIN)/16

• External clock from the HSYNC pin

• External clock from the TIM3 pin

The count source of timer 3 is selected by setting bits 5 and 0 of

timer mode register 2 (address 00F516).

Timer 3 interrupt request occurs at timer 3 overflow.

8.4.4 Timer 4

Timer 4 can select one of the following count sources:

• f(XIN)/16

• f(XIN)/2

• Timer 3 overflow signal

The count source of timer 3 is selected by setting bits 1 and 4 of

timer mode register 2 (address 00F516). When timer 3 overflow sig-

nal is a count source for the timer 4, the timer 3 functions as an 8-bit

prescaler.

Timer 4 interrupt request occurs at timer 4 overflow.

At reset, timers 3 and 4 are connected by hardware and “FF16” is

automatically set in timer 3; “0716” in timer 4. The f(XIN)/16 is se-

lected as the timer 3 count source. The internal reset is released by

timer 4 overflow in this state and the internal clock is connected.

At execution of the STP instruction, timers 3 and 4 are connected by

hardware and “FF16” is automatically set in timer 3; “0716” in timer 4.

However, the f(XIN)/16 is not selected as the timer 3 count source.

So set both bit 0 of timer mode register 2 (address 00F516) and bit 6

at address 00C716 to “0” before execution of the STP instruction

(f(XIN)/16 is selected as the timer 3 count source). The internal STP

state is released by timer 4 overflow in this state and the internal

clock is connected.

As a result of the above procedure, the program can start under a

stable clock.

However, when setting “1” to bit 5 of timer mode register 1 (address

00F416), timers 3 and 4 are not set the above value, the STP state is

set by executing the STP instruction. This allows to program the time

to return from the STP state.

The timer-related registers is shown in Figures 8.4.1 and 8.4.2.

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