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M37225M6 Datasheet(PDF) 22 Page - Renesas Technology Corp |
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M37225M6 Datasheet(HTML) 22 Page - Renesas Technology Corp |
22 / 128 page M37225M6/M8/MA/MC-XXXSP, M37225ECSP Rev.1.00 Nov 01, 2000 page 20 of 124 REJ03B0136-0100Z (4) Serial I/O Interrupt This is an interrupt request from the clock synchronous serial I/O function. (5) f(XIN)/4096 Interrupt The f (XIN)/4096 interrupt occurs regularly with a f(XIN)/4096 pe- riod. Set bit 0 of the PWM mode register 1 to “0.” (6) Multi-master I2C-BUS Interface Interrupt This is an interrupt request related to the multi-master I2C-BUS interface. (7) A-D Conversion Interrupt The A-D conversion interrupt occurs at the completion of A-D conversion. (8) BRK Instruction Interrupt This software interrupt has the least significant priority. It does not have a corresponding interrupt enable bit, and it is not af- fected by the interrupt disable flag I (non-maskable). Fig. 8.3.1 Interrupt Control Interrupt request bit Interrupt enable bit Interrupt disable flag I BRK instruction Reset Interrupt request |
Similar Part No. - M37225M6_15 |
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Similar Description - M37225M6_15 |
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