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M37225M6 Datasheet(PDF) 13 Page - Renesas Technology Corp |
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M37225M6 Datasheet(HTML) 13 Page - Renesas Technology Corp |
13 / 128 page M37225M6/M8/MA/MC-XXXSP, M37225ECSP Rev.1.00 Nov 01, 2000 page 11 of 124 REJ03B0136-0100Z 8. FUNCTIONAL DESCRIPTION 8.1 CENTRAL PROCESSING UNIT (CPU) This microcomputer uses the standard 740 Family instruction set. Refer to the table of 740 Family addressing modes and machine instructions or the SERIES 740 <Software> User’s Manual for de- tails on the instruction set. Machine-resident 740 Family instructions are as follows: The FST, SLW instruction cannot be used. The MUL, DIV, WIT and STP instructions can be used. 8.1.1 CPU Mode Register The CPU mode register contains the stack page selection bit and internal system clock selection bit. The CPU mode register is allo- cated at address 00FB16. Fig. 8.1.1 CPU Mode Register CPU Mode Register b7 b6 b5 b4 b3 b2 b1 b0 B After reset R W 0, 1 2 3 to 5 0 1 Name Functions Processor mode bits (CM0, CM1) 0 0: Single-chip mode 0 1: 1 0: Not available 1 1: Fix these bits to “1.” 1 Stack page selection bit (CM2) (See note) 1 b1 b0 0: 0 page 1: 1 page 1 0 0 6, 7 0 CPU mode register (CM) [Address 00FB16] R W R W R W R W Note: This bit is set to “1” after the reset release. 1 0 0 Fix these bits to “0.” |
Similar Part No. - M37225M6_15 |
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Similar Description - M37225M6_15 |
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