M37225M6_15 datasheet(45/128 Pages) RENESAS

Part #	M37225M6

Description	SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER

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Manufacturer	RENESAS [Renesas Technology Corp]

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45 / 128 page

M37225M6/M8/MA/MC-XXXSP, M37225ECSP

Rev.1.00

Nov 01, 2000

page 43 of 124

REJ03B0136-0100Z

(3) RESTART condition generating procedure

➀Procedure example (The necessary conditions of the generating

procedure are described as the following ➁ to ➅.)

Execute the following procedure when the PIN bit is “0.”

•

LDM

#$00, S1

(Select slave receive mode)

LDA

—

(Taking out of slave address value)

SEI

(Interrupt disabled)

STA

S0

(Writing of slave address value)

LDM

#$F0, S1

(Trigger of RESTART condition generating)

CLI

(Interrupt enabled)

•

➁Select the slave receive mode when the PIN bit is “0.” Do not write

“1” to the PIN bit. Neither “0” nor “1” is specified for the writing to

the BB bit.

The TRX bit becomes “0” and the SDA pin is released.

➂The SCL pin is released by writing the slave address value to the

I2C data shift register. Use “STA,” “STX” or “STY” of the zero page

addressing instruction for writing.

➃Use “LDM” instruction for setting trigger of RESTART condition gen-

erating.

➄Write the slave address value of above ➂ and set trigger of RE-

START condition generating of above ➃ continuously shown the

above procedure example.

➅Disable interrupts during the following two process steps:

• Writing of slave address value

• Trigger of RESTART condition generating

(4) STOP condition generating procedure

➀Procedure example (The necessary conditions of the generating

procedure are described as the following ➁ to ➃.)

•

SEI

(Interrupt disabled)

LDM #$C0, S1

(Select master transmit mode)

NOP

(Set NOP)

LDM #$D0, S1

(Trigger of STOP condition generating)

CLI

(Interrupt enabled)

•

➁Write “0” to the PIN bit when master transmit mode is select.

➂Execute “NOP” instruction after setting of master transmit mode.

Also, set trigger of STOP condition generating within 10 cycles af-

ter selecting of master trasmit mode.

➃Disable interrupts during the following two process steps:

• Select of master transmit mode

• Trigger of STOP condition generating

(5) Writing to I2C status register

Do not execute an instruction to set the PIN bit to “1” from “0” and an

instruction to set the MST and TRX bits to “0” from “1” simultaneously.

It is because it may enter the state that the SCL pin is released and

the SDA pin is released after about one machine cycle. Do not ex-

ecute an instruction to set the MST and TRX bits to “0” from “1” si-

multaneously when the PIN bit is “1.” It is because it may become the

same as above.

(6) Process of after STOP condition generating

Do not write data in the I2C data shift register S0 and the I2C status

register S1 until the bus busy flag BB becomes “0” after generating

the STOP condition in the master mode. It is because the STOP

condition waveform might not be normally generated. Reading to the

above registers do not have the problem.

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