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UPD178002 Datasheet(PDF) 34 Page - NEC |
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UPD178002 Datasheet(HTML) 34 Page - NEC |
34 / 48 page ![]() 34 µPD178002, 178003 Data Sheet U12628EJ3V0DS00 (2) Serial interface (TA = –40 to +85 °C, VDD = 3.5 to 5.5 V) (a) Serial interface channel 1 (i) 3-wire serial I/O mode (SCK1 ... internal clock output) Parameter Symbol Conditions MIN. TYP. MAX. Unit SCK1 cycle time tKCY1 4.5 V ≤ VDD ≤ 5.5 V 800 ns 3.5 V ≤ VDD < 4.5 V 1600 ns SCK1 high-/low-level width tKH1, 4.5 V ≤ VDD ≤ 5.5 V tKCY9/2 – 50 ns tKL1 3.5 V ≤ VDD < 4.5 V tKCY9/2 – 100 ns SI1 setup time (to SCK1 ↑)tSIK1 4.5 V ≤ VDD ≤ 5.5 V 100 ns 3.5 V ≤ VDD < 4.5 V 150 ns SI1 hold time (from SCK1 ↑)tKSI1 400 ns SO1 output delay time from SCK1 ↓ tKSO1 C = 100 pFNote 300 ns Note C is the load capacitance of the SO1 output line. (ii) 3-wire serial I/O mode (SCK1 ... external clock input) Parameter Symbol Conditions MIN. TYP. MAX. Unit SCK1 cycle time tKCY2 4.5 V ≤ VDD ≤ 5.5 V 800 ns 3.5 V ≤ VDD < 4.5 V 1600 ns SCK1 high-/low-level width tKH2, 4.5 V ≤ VDD ≤ 5.5 V 400 ns tKL2 3.5 V ≤ VDD < 4.5 V 800 ns SI1 setup time (to SCK1 ↑)tSIK2 100 ns SI1 hold time (from SCK1 ↑)tKSI2 400 ns SO1 output delay time from SCK1 ↓ tKSO2 C = 100 pFNote 300 ns SCK1 rise/fall time tR2, tF2 1000 ns Note C is the load capacitance of the SO1 output line. |
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